ResponsibilitiesThe
Senior Verification Engineer should have the ability to work with cross-discipline teams (architecture, design, verification) to develop environment and test cases to verify designs.
Responsibilities include:
- Test Plan Creation and Review
- Testbench/Environment Creation
- Crafting of Test cases
- Functional Coverage Development and Closure
- Code Coverage Closure
QualificationsRequired Qualifications: Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience.
Other: Ability to meet Microsoft, customer, and/or government security screening requirements is required for this role. These requirements include, but are not limited to, the following specialized security screening: Microsoft Cloud Background Check. This position is required to pass the Microsoft Cloud Background Check upon hire or transfer and every two years thereafter.
This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their U.S. permanent residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.
Preferred Qualifications: - 6+ years of experience in developing test plans, creating simulation environments, developing tests, and debugging for multiple IPs, SoCs or systems
- Substantial background in creating simulation environments, developing tests or debugging designs
- Solid understanding of chip and/or computer architecture
- Experience writing tests in UVM
- Knowledge of AXI protocol
- Experience in debugging Subsystems/SOCs scenarios with embedded processors
- Experience with secure hardware design for embedded systems
- Experience with hardware emulation or FPGAs
- Experience in RTL design for FPGA or emulation
- Experience in Assembly, start up code and linker scripts
- Experience in developing makefiles for software development
#SCHIE
Silicon Engineering IC4 - The typical base pay range for this role across the U.S. is USD $119,800 - $234,700 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $160,200 - $261,000 per year.
Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:
https://careers.microsoft.com/us/en/us-corporate-pay
This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.
