R&D Simulation Technical Manager, Joint Development Modules (7734)

Taiwan Semiconductor Manufacturing Company Limited

$180K — $250K *
Consumer Technology
5 - 7 years of experience
Job Overview by Ladders

Qualifications

  • Ph.D. in Mechanical Engineering, Chemical Engineering, Physics, Chemistry, Computational Materials Science, Electrical Engineering, or a related STEM field.
  • Minimum of 7 years of semiconductor-related hardware design and process simulation experience (Ph.D.).
  • Extensive manufacturing-focused process simulation and hands-on experience with computational and AI methodologies.
  • Expertise in transport phenomena and skills in scaling and reduced-order model development.
  • Hands-on expertise in computational methods such as KMC, CGMD, and DFT, with validation skills for hardware impact on process performance.

Responsibilities

  • Partner with US tool suppliers to co-design next-generation process chambers and hardware systems.
  • Lead process modeling and simulations for critical subsystems, including plasma delivery and reaction kinetics.
  • Collaborate with TSMC R&D module teams to transform simulation insights into actionable specifications.
  • Serve as the onsite technical expert in California, guiding suppliers in technology alignment.

Benefits

  • Market competitive pay with allowances and bonuses.
  • Comprehensive benefits package.
  • Extensive professional development opportunities.
  • Hybrid work schedule with 4 days in-office.
Full Job Description
TSMC's Advanced Tool and Module Development Function in R&D is establishing a new engineering team in the US as an extension of its organization in Taiwan. This newly formed team will serve as the on-site technical bridge and represent headquarter R&D teams in working shoulder-to-shoulder with US-based semiconductor equipment suppliers. The mission is to accelerate the hardware and process development cycle, from prototype creation to process verification.

In this role, you will go beyond managing vendor relations-you will co-develop and co-design mathematical models, computational methodologies, and simulations for next-generation and pre-alpha hardware from the ground up. Your mission is to accelerate the hardware verification and commercialization pipeline, directly influencing the future of global semiconductor fabrication. Because this team covers the entire spectrum of process modules (Etch, EPI, Thin Film, Wet, CMP, Metrology, etc.), TSMC is seeking versatile, brilliant, and innovative minds who excel at integrating process physics, chemistry, simulations, and hardware design from initial concept to high-volume manufacturing (HVM) readiness.

You will join us in our San Jose office, operating on a hybrid work schedule with 4 days in-office.

Responsibilities
  • Co-Design & Joint Development: Partner deeply with key US tool suppliers to drive the engineering, architecture, and design of pre-alpha and next-generation process chambers and hardware systems.
  • Process Modeling and Simulation: Lead technical initiatives in advanced process modeling, reduced-order modeling, and simulations for critical subsystems. This includes, but is not limited to, plasma and gas delivery, homogeneous and heterogeneous reaction kinetics, phase transitions, transport phenomena, high-performance computing (HPC), and the application of agentic AI tools.
  • Cross-Module Collaboration: Interface with R&D headquarter module teams across various TSMC R&D process areas (Etch, Thin Film, Wet Clean, CMP, Metrology). Focus on turning simulation results into insights and refining process solution specifications for optimal performance.
  • Technical Leadership: Act as the on-site TSMC technical expert in California, guiding supplier engineering teams to align with TSMC's aggressive technology roadmap.


Minimum Qualifications
  • Ph.D. in Mechanical Engineering, Chemical Engineering, Physics, Chemistry, Computational Materials Science, Electrical Engineering, or a related STEM field with a focus on computational work.
  • A minimum of 7 years of experience (Ph.D.) in semiconductor-related hardware design, process simulation, theoretical analysis and validation, or equipment development.
  • Extensive experience in manufacturing-focused process simulation, fundamental research, and hands-on applications of computational and AI methodologies.
  • Comprehensive expertise in the physical principles of process-relevant transport phenomena, with strong skills in scaling and reduced-order model development.
  • Hands-on expertise in computational methods for material sciences, such as KMC, CGMD, PFM, PFC, or DFT. Skilled in validating the impact of hardware changes on process performance across modules such as Etch, EPI, PVD/CVD/ALD, Wet, or CMP.

Preferred Qualifications
  • Ph.D. with research focus on plasma-hardware interaction, RF systems, or fluid dynamics.
  • Candidates with exceptional academic pedigrees and groundbreaking research in "pre-alpha" hardware systems will be considered, even if they have fewer years of industry experience.
  • Strong cross-functional communication and negotiation skills to effectively collaborate with external supplier executives and internal TSMC R&D teams.
  • A thriving mindset in an ambiguous, fast-paced, "pre-alpha" R&D environment.


Pay Transparency / Benefits statement

At TSMC, your base pay is only part of your overall total compensation package. At the time of this posting, this role typically pays a base salary between $180,000 and $250,000 per year. The range displayed reflects the minimum and maximum target for new hires. Actual pay may be more or less than the posted range. Factors that influence pay include the individual's skills, qualifications, education, experience and the position level and location. TSMC's total compensation package consists of market competitive pay, allowances, bonuses, and comprehensive benefits. We also offer extensive development opportunities and programs.

Date: Jun 18, 2026

Country/Region: US

City: San Jose

Company: TSMC Technology, Inc.

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