Astera Labs

Principal Product Technical Leader - AEC/SCM

Astera Labs • $160K — $200K *
Technical Services
5 - 7 years of experience
Job Overview by Ladders

Qualifications

  • Bachelor's degree in Electrical or Computer Engineering
  • 5+ years of digital design experience including full chip projects
  • Strong proficiency in Verilog/SystemVerilog
  • Hands-on experience with timing closure and low-power design
  • Solid understanding of PCIe, Ethernet, or high-speed interfaces

Responsibilities

  • Own RTL design for assigned blocks from microarchitecture to synthesis
  • Develop high-quality, synthesizable Verilog/SystemVerilog
  • Drive design reviews and timing closure activities
  • Partner with architecture to translate specs into microarchitecture
  • Collaborate on test plans and bug triage with verification
  • Mentor junior engineers and enhance design methodologies
  • Debug complex pre-silicon and post-silicon issues

Benefits

  • Discretionary bonus eligibility
  • Incentives based on performance
  • Comprehensive health coverage options
  • Opportunities for professional development
  • Flexible work arrangements
Full Job Description
Role Overview

Astera Labs is seeking a hands-on Principal Product Technical Leader to drive product integration for Active Electrical Cables (AECs) and Smart Cable Modules (SCMs) used in rack-scale AI infrastructure. You will serve as a technical owner across high-speed silicon and retimers, firmware, PCB or flex circuitry, cable assemblies, connectors, mechanical and thermal design, signal integrity, validation, manufacturing, and customers.

You will translate system and customer requirements, engineering data, and field feedback into reliable, production-ready products. This is an individual-contributor role: you will lead complex technical investigations, resolve cross-domain issues, strengthen product readiness, and improve repeatable integration and debug practices. You should bring deep expertise in at least one relevant discipline and working knowledge across adjacent domains.
Key Responsibilities
Product integration and validation
  • Define product-level interfaces, integration plans, risks, validation checkpoints, and readiness criteria from design through production release.
  • Influence architecture and design decisions early, finding creative, practical solutions to tradeoffs across signal integrity, retimer and firmware integration, power, thermal performance, mechanical constraints, manufacturability, cost, and schedule.
  • Lead product-level electrical compliance and system validation for AEC/SCM products, including channel performance, eye margins, jitter, equalization, link training, BER, interoperability, and resolution of system-level issues.
  • Direct and review AEC/SCM hardware validation, including board-level probing, circuit verification, functional testing under nominal, corner, mechanical, and environmental conditions, and reliability/failure analysis; ensure results are correlated to design requirements and corrective actions are driven to closure.
  • Drive root-cause analysis for issues spanning silicon, firmware, hardware, SI, mechanical, thermal, test, and manufacturing teams.
Production readiness and technical execution
  • Partner with NPI, manufacturing, quality, and operations teams to transition products from development into volume production.
  • Drive DFM/DFA/DFT reviews, production-test development, test-coverage improvements, yield analysis, and manufacturability feedback.
  • Own technical investigations and corrective actions for complex failures, process excursions, production escapes, and field issues.
  • Establish clear product specifications, issue-tracking practices, technical reports, and readiness reviews.
Customer and cross-functional leadership
  • Provide technical direction during customer bring-up, interoperability testing, platform qualification, and escalations.
  • Collaborate with applications and customer engineering teams to resolve design-in challenges and translate field feedback into product improvements.
  • Lead cross-functional design and integration reviews across hardware, firmware, SI, mechanical, test, manufacturing, and quality.
  • Mentor engineers and improve documentation, debug workflows, integration methods, and engineering standards.

The base salary range is $160,000 USD - $200,000 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

About Astera Labs

Astera Labs is a semiconductor company that designs and develops purpose-built connectivity solutions for data-centric systems. The company's portfolio of products includes system-aware semiconductor integrated circuits (ICs), boards, and intellectual property (IP) that are used in data center servers, storage, and networking equipment. Astera Labs' products are designed to improve the performance, latency, and power consumption of data-centric systems. The company was founded in 2018 and is headquartered in Santa Clara, California.
Learn more about Astera Labs
Size
51 employees
Industry
Net Income
-$3 million
Founded
2018
Revenue
$5 million
NASDAQ

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