Principal Engineer, Photonics Reliability

Ayar Labs

$190K — $240K *
Technical Services
5 - 7 years of experience
Job Overview by Ladders

Qualifications

  • Master's degree in Electrical Engineering, Physics, Materials Science, or a related field.
  • 7+ years of semiconductor reliability experience, including 4 years in Silicon Photonics or Optoelectronics.
  • Deep understanding of foundry process flows and unique photonics reliability challenges.
  • Proven expertise in developing aging models for semiconductors or photonic devices.
  • Familiarity with JEDEC, Telcordia (GR-468), and MIL-STD qualification standards.

Responsibilities

  • Integrate Design for Reliability (DfR) principles early in product development.
  • Conduct Failure Mode and Effects Analysis (FMEA) on silicon photonics components.
  • Collaborate with Design and Layout teams to mitigate known failure mechanisms.
  • Serve as technical lead for reliability requirements with Foundries.
  • Define and drive wafer-level reliability structures and test vehicles.
  • Develop Physics-of-Failure models to predict Failure in Time rates.
  • Lead complex Root Cause Analysis (RCA) investigations and develop corrective action plans.

Benefits

  • On-site position in San Jose with access to state-of-the-art facilities.
  • Opportunity to influence high-impact optical I/O solutions for AI and data centers.
  • Work at the intersection of R&D and high-volume manufacturing for cutting-edge technology.
  • Engage with industry leaders and advanced packaging partners in a collaboration-focused environment.
Full Job Description
Principal Engineer, Photonics Reliability

Location: San Jose (on-site)

The Role
In this high-impact role, you will lead the reliability roadmap for our silicon photonics platform. You will bridge the gap between R&D and high-volume manufacturing, ensuring that our optical I/O solutions exceed the stringent requirements of the world's leading AI and data center customers. Your expertise will directly influence the design of our chiplets and the qualification of our foundry processes.

Key Responsibilities
1. Design for Reliability (DfR)
Integrate DfR principles into the earliest stages of the product development lifecycle (NPI).

Conduct Failure Mode and Effects Analysis (FMEA) on silicon photonics components, focusing on all Optical elements .

Collaborate with the Design and Layout teams to implement design-based mitigations for known failure mechanisms like electromigration, dielectric breakdown, and optical degradation.

2. Foundry & Ecosystem Reliability
Serve as the technical lead for reliability with Foundries , ensuring their photonics processes meet Ayar Labs' quality benchmarks.

Define and drive wafer-level reliability (WLR) structures and test vehicles to characterize new process nodes.

Manage reliability requirements for advanced packaging and Co-Packaged Optics (CPO) with OSAT partners.

3. Advanced Reliability Modeling
Develop and refine Physics-of-Failure (PoF) models for silicon photonics devices to predict FIT (Failures in Time) rates and DPPM.

Utilize statistical software (JMP, Minitab, or Python) to perform Weibull and Lognormal analysis on accelerated life testing (ALT) and degradation data.

Model the impact of environmental stressors (thermal cycling, humidity, high-power optical loads) on the long-term performance of the Phontics chiplet.

4. Failure Analysis & Root Cause
Lead complex Root Cause Analysis (RCA) investigations using advanced techniques such as FIB, SEM/TEM, EDX, and EFA.

Develop corrective action plans (CAPA) to resolve reliability issues discovered during qualification or in-field deployment.

Required Qualifications
  • Education: Master's degree in Electrical Engineering, Physics, Materials Science, or a related field.
  • Experience: 7+ years of semiconductor reliability experience, with at least 4 years focused specifically on Silicon Photonics or Optoelectronics.
  • Foundry Knowledge: Deep understanding of foundry process flows and the reliability challenges unique to photonics (e.g., optical power handling, aging, and thermal management in CPO).
  • Modeling Mastery: Proven track record in developing aging models (Arrhenius, Coffin-Manson, etc.) for semiconductor or photonic devices.
  • Standards Expertise: Familiarity with JEDEC, Telcordia (GR-468), and MIL-STD qualification standards.


Preferred Skills
  • Ph.D.
  • Hands-on experience with Python for automated reliability data pipelines.
  • A "startup mindset"-the ability to thrive in a fast-paced environment where you must often build processes from the ground up.


Annual Salary Range: $190,000 - $240,000

NOTE TO RECRUITERS:
Principals only. We are not accepting resumes from recruiters for this position. Remuneration for recruiting activities is only applicable subject to a signed and executed agreement between the parties. Please don't send candidates to Ayar Labs, and do not contact our managers.

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