Your Team, Your Impact

The Custom Compute, Storage and Automotive Business Unit provides custom solutions for high performance compute, server, network processing, storage and Automotive applications. CCS&A products employ state-of-the-art custom and industry standard technologies such as CXL, PCIE, Ethernet, and ARM CPU cores.

What You Can Expect

• Work with SOC Integration team to integrate internal and external IP blocks at the chip level.
• Take ownership of a portion of an SOC design and drive it from initial stages to completion
• Collaborate on floorplan
• Responsibility for interconnection of IP blocks
• Static checks
• Assist with subsystem and chip level verification efforts
• Drive to timing closure
• Collaborate with cross-disciplinary team including architecture, physical design, chip and block level verification, Design for Test, and packaging to meet all requirements to tape-out a high quality, zero-defect product.
• Use both industry and internal EDA tools to run functional simulations, gate-level simulations, code quality checks, and CDC at the chip level.
• Lead design effort for internally developed processor IP blocks to meet specific architectural needs.
• Work closely with verification and implementation teams to meet product requirements.
• Deliver micro-architectural specifications for these designs.
• Utilize and participate in the development of automation tools to accelerate the pace of development.
• Leverage next-generation AI tools to enhance existing work flows.
• Mentor and guide junior engineers

What We're Looking For

• Bachelor's degree in Electrical engineering, Electronics, Computer engineering, or related fields with 10-15 years of experience.
• Master's degree and/or PhD in Electrical engineering, Electronics, Computer engineering, or related fields with 5-10 years of experience.
• Proven experience in taping out complex SoCs and post silicon debug
• Strong RTL design skills in SystemVerilog
• Hands-on experience with SoC integration and debug, along with clock/reset design, CDC, and timing constraints.
• Understanding of how front-end RTL decisions impact physical implementation and verification.
• Familiarity with industry standard ARM protocols (Ex: APB, AHB, AXI, CHI) and SoC interconnect (NOC) architectures.
• Excellent communication skills and ability to participate in problem-solving and quality improvement activities.
• Demonstrates good analytical and problem-solving skills.
• Experience with scripting languages, e.g., Python or Tcl
• Experience with providing technical leadership to junior engineers

Expected Base Pay Range (USD)
158,600 - 237,600, $ per annum

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements
Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life's most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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