Cadence Design Systems

Principal Design Engineer

Cadence Design Systems$120K — $150K *
Information Technology
Less than 5 years of experience
Job Overview by Ladders

Qualifications

  • 5-7 years of experience in Subsystem/SOC level verification projects
  • In-depth knowledge of SV-UVM
  • Expertise in architecting and developing scalable verification environments
  • Strong experience in developing and executing verification test plans
  • Proficient in C-based test case development
  • Strong understanding of AMBA protocols and at least one additional protocol such as USB, PCIe, or Ethernet
  • Proven leadership skills in mentoring junior engineers

Responsibilities

  • Independently verify complex modules or significant components in subsystem/SOC verification
  • Define and implement methodology for subsystem/SOC verification
  • Mentor junior engineers to enhance their verification skills
  • Utilize a metric-driven approach to verification, emphasizing quality and completeness
  • Collaborate with cross-functional teams to ensure timely project delivery

Benefits

  • Mentorship opportunities for professional growth
  • Dynamic and fast-paced work environment
  • Collaborative cross-functional projects
  • Recognition for high-quality output
  • Potential involvement in cutting-edge technology development
Full Job Description
Design Verification expert with good subsystem and SOC level verification. Must possess excellent debug skills. Expert in developing SV UVM based testbenches. Ability to coach and mentor less experience teammates. Should have worked on time-bounded projects leading to Si realization.

Independently handle verification of complex modules or own significant piece in subsystem / SOC based verification. Define methodology for subsystem/SOC verification. Mentor less experienced engineers to bring them up as independent verification engineer. Follow systematic approach of metric driven verification with meticulous attention to quality and completeness. Should be able work closely across teams to meet delivery timelines.

Required experience
  • Worked on Subsystem / SOC level verification projects
  • Experience in ARM based designs.
  • In-depth knowledge SV-UVM
  • Expertise in architecting, design and development of scalable verification environments from scratch. Define verification architecture and verification strategy
  • Expertise in verification test plan development, test cases coding; Execute and debug test cases to achieve functional and code coverage goals
  • Experience in C based testcase development
  • Strong knowledge of AMBA protocols like AXI, ACE, APB, AHB.
  • Good knowledge of at least one of the USB/PCIE/Ethernet/DDR/LPDDR or similar protocols
  • Strong problem solving skills. Exhibit discipline, thoroughness and methodical approach in solving problems
  • Ability to work with stakeholders across cross-functional teams - Architecture, Design, Internal and External Customers
  • Experience in mentoring junior engineers
  • Self-driven and committed individual who can work in a fast paced project environment


Desirable skills and experience

  • Prior experience with Cadence tools and flows is highly desirable
  • Familiarity with ARM/CPU architectures is a plus
  • Experience in developing c-based test cases for SOC verification
  • Experience with assembly language programming
  • Good knowledge of some of the protocols like UART, I2C, SPI, JTAG
  • Embedded C code development and debug
  • Formal Verification experience
  • Cadence verification tool experience


Strong vocabulary, communication, organizational, planning, and presentation skills are essential. Ability to work independently and productively with high quality output and results in a fast paced and dynamic environment. A strong positive attitude and ability to work in a team is a must. Self-motivated and willing take up additional responsibilities to contribute to team's success.

About Cadence Design Systems

Cadence Design Systems, Inc. is an American multinational electronic design automation software and engineering services company, founded in 1988 by the merger of SDA Systems and ECAD, Inc. The company produces software, hardware and silicon structures for designing integrated circuits, systems on chips (SoCs) and printed circuit boards.
Learn more about Cadence Design Systems
Size
9,300 employees
Market Cap
$43.9 billion
Industry
Net Income
$590.6 million
Founded
2018
5 Year Trend
+10.5%
Revenue
$2.6 billion
NASDAQ

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