Marvell Technology

Package Design Engineer

Marvell Technology$166K — $249K *
Telecommunications & Hardware
5 - 7 years of experience
Job Overview by Ladders

Qualifications

  • BS/MS/PhD in EE/ECE/MSE/ME/ChemE or related disciplines.
  • 5-10 years of experience in Semiconductor Packaging Design, specifically with heterogeneous architectures.
  • Extensive experience with advanced packaging design tools such as Cadence APD.
  • Knowledge in 2.5D/3D packaging technologies like InFO, CoWoS, FoCoS, and EMIB.
  • Proven track record with substrate vendors and OSATs for manufacturing and assembly requirements.

Responsibilities

  • Lead package design co-design work with system design and ASIC teams.
  • Scope package design feasibility at Silicon interposer and substrate levels.
  • Support pre/post silicon activities including yield improvement and failure analysis.
  • Lead package layout based on high-speed interface specifications.
  • Plan and execute Silicon interposer and RDL based design layout solutions.
  • Engage with substrate suppliers and OSATs for IC package production and assembly.
  • Drive innovation in advanced package solutions with vendors.

Benefits

  • Employee stock purchase plan with a 2-year look back.
  • Family support programs for work-life balance.
  • Robust mental health resources for emotional well-being.
  • Recognition awards to celebrate contributions and milestones.
Full Job Description

Your Team, Your Impact

Advanced Packaging Physical Design for Photonic Fabric BU

What You Can Expect

  • Package Design:
    • Lead Si/package/PCB/system co-design work collaborating with downstream system design teams and upstream ASIC designers to develop a portfolio of packages that meets a huge range of performance design points, while optimizing re-use in other Marvell products.
    • Scope all aspects of package design feasibility at Silicon interposer and substrate level for multi-chip SiP packaging.
    • Support pre/post silicon bring up, yield improvement activities, qualification, failure analysis, and system implementation.
  • Package Layout Expertise:
    • Lead all aspects of package layout based on I/O, SI-PI and form factor requirements, including routing, design for reliability, thermal, mechanical, manufacturability, bumping, substrate, material selection, assembly, and support for testing.
    • Meet specifications for high-speed interfaces such as HBM, DDR, PCIe and 56G/112G SerDes.
  • 2.5D and 3D Package Design Planning and Execution:
    • Plan and execute Silicon interposer and RDL based design layout solutions for advanced packaging architectures.
    • Netlist management for heterogeneous chiplet assemblies using latest EDA solutions.
  • Substrate Manufacturing and OSAT Assembly Engagement:
    • Supporting activities related to production and assembly of IC packages with substrate suppliers and OSATs.
    • Work with cross-functional teams and support package integration and architecture efforts with vendors.
    • Actively participate in qualification of package and board level assembly with sensitivity to physics of failures for high thermo-mechanical reliability, driving appropriate test vehicle definition and design.
    • Drive ideation and innovation of advanced package solutions and specifications with vendors to advance productization efforts by Marvell

What We're Looking For

  • Education: BS/MS/PhD in EE/ECE/MSE/ME/ChemE or related disciplines.
  • Experience: 5-10 years of experience in Semiconductor Packaging Design of heterogeneous architectures, including silicon interposer and RDL designs.
  • Technical Expertise:
    • Extensive experience working with advanced packaging design tools such as Cadence APD.
    • Experience working with MCAD tools such as SolidWorks, AutoCAD and interconversion of package design databases to MCAD files.
    • Knowledge and insights to deliver high density/high performance interconnects in various 2.5D/3D packaging technologies including InFO, CoWoS, FoCoS and EMIB.
    • Good understanding of cross-functional packaging areas: Si floor plan, package, board layout and architecture, design rules, BOM, enabling material/process technologies, thermal, mechanical, Signal/Power Integrity, design for manufacturing, assembly, reliability, and cost.
    • Familiarity with photonics packaging is a plus but not necessary.
  • Substrate Vendor and OSAT Engagement:
    • Proven track record of working with substrate vendors to meet design for manufacturing, yield, and reliability.
    • Proven track record of engagement with OSATs to meet assembly requirements and drive new developments to meet new product requirements.
  • Industry Knowledge: Experience in High Speed Signaling best practices, Signal and Power integrity requirements.
  • Soft Skills: Strong analytical, problem-solving, cross-functional collaboration, project management, and technical presentation skills.

Expected Base Pay Range (USD)

166,520 - 249,500, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.

Interview Integrity 

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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About Marvell Technology

Marvell Technology is a semiconductor company that designs and develops analog, mixed-signal, and digital signal processing integrated circuits. The company's product portfolio includes processors, connectivity, storage, and security solutions. Marvell's customers operate in various industries, including data center, enterprise, automotive, industrial, and consumer electronics. The company was founded in 1995 and is headquartered in Santa Clara, California.
Learn more about Marvell Technology
Size
6,729 employees
Market Cap
$30.6 billion
Industry
Net Income
-$277.3 million
Founded
2013
5 Year Trend
+14.2%
Revenue
$2.9 billion
NASDAQ

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