Position OverviewWe are seeking a seasoned Senior or Staff Analog Layout Engineer to play a vital role in developing cutting-edge full-custom electronic transceiver components that interface directly with our custom silicon photonics and are essential to our revolutionary photonic AI platform. You will develop and optimize high-performance Analog IPs tailored for TSMC's deep-submicron processes, including N12, N3P, and N2P. You will push the boundaries of Power, Performance, and Area (PPA) while mitigating the impact of Restricted Design Rules (RDRs) and electromigration.
LocationSan Jose, CA or Hsinchu, Taiwan. Full-time onsite position.
Key Responsibilities- Perform custom IC layout execution of high-speed analog/RF circuits.
- Optimize layout solutions to meet stringent TSMC manufacturing constraints, DFM rules, and antenna restrictions
- Deliver IP-level floor planning, power planning, and signal distribution, implementing layout techniques for strict ESD and Latch-up prevention.
- Execute and debug block-level design sign-offs, including DRC (Design Rule Check), LVS (Layout Versus Schematic), and RC Extraction using standard industry tools.
- Evaluate layout trade-offs among area, yield, and performance; implement the power and clock delivery networks to ensure power and signal integrity.
- Coordinate directly with circuit designers, CAD engineers, and EDA vendors to ensure IP design fits seamlessly into the production flow.
Qualifications- B.S. or M.S. degree in Electrical Engineering, Computer Engineering, or a closely related discipline.
- 3-8+ years of professional custom or block-level IC layout experience in deep-submicron, advanced FinFET/GAA nodes (3nm, 2nm, etc.).
- Mastery of industry-standard EDA tools for layout and verification (e.g., Cadence Virtuoso, Synopsys Custom Compiler, Mentor Calibre, Siemens ICV).
- Deep understanding of deep-submicron layout techniques, parasitic reduction, matching strategies, and electro-migration (EM/IR).
Preferred Skills- Prior tape-out success in TSMC N3 or N2 process nodes.
- Domain knowledge in laying out high-performance analog/mixed signal blocks, such as PLLs and Data Converters (ADC/DAC).
- Working knowledge of layout automation scripting languages (e.g., TCL, Perl, Python).
What We OfferThis is an opportunity to play a pivotal role in an innovative startup redefining the future of AI hardware. Work on a game-changing technology at the intersection of photonics and AI as part of a collaborative and brilliant team. You'll contribute to a platform that redefines computational performance and accelerates the future of artificial intelligence. Come help us bring this transformative technology to the world.
BenefitsJoin a team that invests in your future and your well-being. At Neurophos, we offer:
- 100% coverage of base health plan premiums for you and your dependents, plus HSA contributions.
- Unlimited PTO. No rigid vacation banks, just a focus on delivery.
- 401(k) matching and stock option opportunities to ensure our success is your success.
- Full suite of voluntary benefits, including Dental, Vision, Life, Hospital, Critical Illness, and Accident insurance.
- Personalized Benefits. Choose the plans that fit your life and take the cash back for those that don't.
