Cadence Design Systems

Lead Design Engineer

Cadence Design Systems$114K — $213K *
Consumer Technology
Less than 5 years of experience
Job Overview by Ladders

Qualifications

  • Master's degree (M. Tech) with 4 years or Bachelor's degree (B. Tech) with 6 years of experience in relevant field.
  • Strong understanding of DDR interfaces including DDR5, LPDDR5, LPDDR6, HBM4, and GDDR7.
  • Proficient in Python for automation and data processing.
  • Experience with JIRA and debugging workflows in a collaborative environment.
  • Expertise in post-silicon validation and testing strategies.

Responsibilities

  • Lead the validation of next-gen DDR interfaces by developing comprehensive testing methodologies.
  • Innovate testing strategies to expedite post-silicon bring-up processes.
  • Analyze and visualize complex data to derive actionable insights for product improvement.
  • Drive JIRA-based debugging processes and facilitate cross-team collaboration to resolve issues.
  • Create impactful characterization reports that guide product decisions and enhance customer satisfaction.
  • Automate validation and reporting processes using Python to improve efficiency.
  • Act as a primary resource for addressing customer challenges related to DDR IP, ensuring swift support.

Benefits

  • Paid vacation and holidays
  • 401(k) plan with employer match
  • Employee stock purchase plan
  • Variety of medical, dental, and vision plan options
Full Job Description
Job Description:
  • Lead cutting-edge electrical and functional validation for next-generation DDR interfaces such as DDR5, LPDDR5, LPDDR6, HBM4 and GDDR7.
  • Design and execute innovative testing strategies to accelerate post-silicon bring-up.
  • Transform raw data into actionable insights through advanced analysis and visualization.
  • Resolve complex issues by driving JIRA-based debug workflows and collaborating across teams.
  • Deliver high-impact characterization reports that influence product decisions and customer success.
  • Automate using Python for validation, data processing, and reporting.
  • Be the go-to expert for customer DDR IP challenges, ensuring rapid debug and world-class technical support.


Experience:

M. Tech + 4 years' experience or B. Tech with 6 years' experience.

The annual salary range for California is $114,800 to $213,200. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

About Cadence Design Systems

Cadence Design Systems, Inc. is an American multinational electronic design automation software and engineering services company, founded in 1988 by the merger of SDA Systems and ECAD, Inc. The company produces software, hardware and silicon structures for designing integrated circuits, systems on chips (SoCs) and printed circuit boards.
Learn more about Cadence Design Systems
Size
9,300 employees
Market Cap
$43.9 billion
Industry
Net Income
$590.6 million
Founded
2018
5 Year Trend
+10.5%
Revenue
$2.6 billion
NASDAQ

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