ASML Holding

JB061568 - Lead ASIC DFT Engineer

ASML Holding • $120K — $160K *
San Jose, CA 95123In-Person
Information Technology
Less than 5 years of experience
Today
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Job Overview by Ladders

Qualifications

  • 5-7 years of hands-on experience in ASIC DFT with end-to-end project ownership.
  • Strong grasp of DFT fundamentals and fault models.
  • Expertise in scan architecture, ATPG, JTAG, and silicon debug processes.
  • Proficient with industry-standard EDA tools such as Synopsys and Cadence.
  • Demonstrated capabilities in scan insertion, simulation, and debug analysis.
  • Experience in MBIST implementation and verification is highly valuable.
  • In-depth knowledge of PLLs, RTL design, and physical design integration.

Responsibilities

  • Lead end-to-end ASIC DFT integration and implementation projects.
  • Develop and validate DFT architecture and test strategies.
  • Perform scan insertion, ATPG setup, and fault coverage analysis.
  • Conduct silicon debug and post-silicon validation activities.
  • Collaborate with cross-functional teams to address multi-domain challenges.
  • Automate DFT processes using TCL/PERL scripting for efficiency.
  • Ensure compliance of designs with DFT methodologies and standards.

Benefits

  • Comprehensive health insurance packages.
  • Opportunities for career advancement and professional development.
  • Flexible working hours and potential for remote work.
  • Collaborative work environment fostering innovation.
  • Access to the latest tools and technologies in the field.
Full Job Description
  • Start Date: Interview Types
  • Skills ASIC DFT, Visa Types Green Card, US Citiz..


    • Required Skills & Qualifications

    • Strong hands-on experience in ASIC DFT with end-to-end ownership.
    • Solid understanding of DFT fundamentals, fault models, test techniques, and test coverage concepts.
    • Deep expertise in scan architecture, ATPG, MBIST, LBIST, JTAG, boundary scan, and silicon debug.
    • Hands-on experience with Synopsys, Cadence, and Siemens/Mentor EDA tools.
    • Proven experience in scan insertion, ATPG setup, simulation, debug, and DRC analysis.
    • Experience with MBIST implementation and verification; SMS experience preferred.
    • Experience with scan architecture and scan chain stitching; Tessent/SSN experience preferred.
    • Strong understanding of PLLs, RTL design, synthesis flows, logical equivalence checking (LEC), and physical design implementation.
    • Proven post-silicon debug and silicon bring-up experience.
    • Exposure to large SoC designs, hierarchical DFT flows, and multi-domain integration challenges.
    • Strong communication skills and the ability to work independently with minimal ramp-up.


    Preferred Experience

    • MBIST post-silicon validation.
    • ATPG simulations and fault coverage debug.
    • DFT RTL, DFD, DFT verification, and IP-level DFT integration.
    • DFT SDC creation and DFT timing closure support.
    • Boundary scan, iJTAG, SSN, and design-for-debug methodologies.
    • TCL/PERL scripting for DFT automation, reporting, and debug.
    • Experience working across multiple ASIC technology nodes and complex product development cycles.
    • Familiarity with yield learning, diagnosis, and manufacturing test optimization.

    About ASML Holding

    ASML Holding is a Dutch company that specializes in the manufacture of photolithography systems used in the production of semiconductors. The company was founded in 1984 and is headquartered in Veldhoven, Netherlands. ASML Holding is one of the world's leading suppliers of photolithography systems, which are used by semiconductor manufacturers to produce integrated circuits and other microdevices. The company's products are used in a wide range of applications, including smartphones, computers, and other electronic devices. ASML Holding has operations in more than 60 locations around the world and employs over 28,000 people.
    Learn more about ASML Holding
    Size
    30,861 employees
    Market Cap
    $217.7 billion
    Industry
    Manufacturing & Automotive
    Net Income
    $3.5 billion
    5 Year Trend
    +22%
    Revenue
    $13.9 billion
    NASDAQ
    ASML
    * Ladders Estimates

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