Synopsys Inc

Interface IP Verification Engineer (Pre-Silicon) - 18380

Synopsys Inc$120K — $145K *
Information Technology
5 - 7 years of experience
Job Overview by Ladders

Qualifications

  • BSEE/MSEE with 5+ years of ASIC/SoC verification experience using SystemVerilog and UVM.
  • Expertise in PCIe, CXL, DDR, Ethernet, or other high-speed interfaces.
  • Experience in developing constrained-random, coverage-driven verification environments.
  • Strong debugging skills in RTL, simulation, and protocol compliance.
  • Proficient with VCS, ModelSim, or similar simulation tools.
  • Capacity to drive technical initiatives independently and collaborate across global teams.

Responsibilities

  • Own verification of PCIe, CXL, DDR, and Ethernet interface IP solutions.
  • Architect and implement scalable UVM-based verification environments.
  • Develop and execute verification strategy from specification review to product release.
  • Collaborate with architecture, RTL design, firmware, and system teams to identify issues early on.
  • Debug complex design and system-level issues, enhancing verification efficiency.
  • Mentor engineers and evolve verification best practices organization-wide.

Benefits

  • Comprehensive health, wellness, and financial benefits.
  • Total rewards include both monetary and non-monetary offerings.
  • Eligibility for annual bonuses and equity incentives.
Full Job Description
Descriptions & Requirements

Job Description and Requirements

In This Role You Will:

Own verification of next-generation PCIe, CXL, DDR, and Ethernet IP powering AI, cloud, networking, and high-performance computing systems. Work alongside industry-leading architects to deliver technology used in the world's most advanced semiconductor designs.

What You'll Be Doing:

  • Own verification of industry-leading Interface IP solutions including PCIe, CXL, DDR, and Ethernet technologies.
  • Architect and develop scalable UVM-based verification environments and reusable verification IP.
  • Drive verification strategy from specification review through coverage closure and product release.
  • Collaborate closely with architecture, RTL design, firmware, and system teams to identify issues early and accelerate product quality.
  • Debug challenging design and system-level issues while improving verification efficiency and automation.
  • Mentor engineers and contribute to the evolution of verification best practices across the organization.


The Impact You Will Have:

  • Ensuring the delivery of high-quality, reliable ASIC designs that meet customer specifications.
  • Enhancing the robustness and efficiency of our verification processes and methodologies.
  • Contributing to the successful launch of Interface IP products, impacting various industries.
  • Driving innovation and excellence within the verification team.
  • Improving the overall performance and functionality of Synopsys' IP offerings.
  • Fostering a culture of continuous improvement and technical excellence.


What You'll Bring:

  • BSEE/MSEE with 5+ years of direct industry proven success verifying complex ASIC or SoC designs using SystemVerilog and UVM.
  • Strong protocol expertise in one or more of the following: PCIe, CXL, DDR, Ethernet, or other high-speed interfaces.
  • Experience developing constrained-random, coverage-driven verification environments.
  • Strong debugging skills across RTL, simulation, and protocol compliance issues.
  • Experience with industry-standard simulators such as VCS, ModelSim, or similar tools.
  • Ability to drive technical initiatives independently while collaborating across global engineering teams.


What Success Looks Like:

  • Deliver robust verification solutions for complex Interface IP products.
  • Improve testbench reuse, coverage, and verification efficiency.
  • Influence methodology improvements across the verification organization.
  • Help develop the next generation of verification talent through mentorship and technical leadership.


Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

#LI-SW1

In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.

About Synopsys Inc

Synopsys, Inc. is an American electronic design automation company that focuses on silicon design and verification, silicon intellectual property and software security and quality. Products include logic synthesis, behavioral synthesis, place and route, static timing analysis, formal verification, hardware description language (SystemC, SystemVerilog/Verilog, VHDL) simulators, as well as transistor-level circuit simulation. The simulators include development and debugging environments which assist in the design of the logic for chips and computer systems.
Learn more about Synopsys Inc
Size
16,361 employees
Market Cap
$48.6 billion
Industry
Net Income
$722.6 million
Founded
1986
5 Year Trend
+13.3%
Revenue
$3.8 billion
NASDAQ

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