Position Overview

We are seeking an Engineering Director - Verification IP to lead the development of comprehensive verification IP solutions for next-generation interfaces and protocols. You'll be at the forefront of innovation, directing a team that creates industry-leading verification solutions for PCIe Gen5/Gen6, USB3.2, 400Gigabit Ethernet, DDR5, LPDDR5, and coherency protocols like CXL for use with Questa RTL simulation.

This is your opportunity to shape the future of verification technology. Based in Austin, Texas, you'll work with cross-functional teams, field partners, and customers worldwide to deploy and resolve critical verification challenges. You'll combine deep technical expertise with strong leadership to drive product excellence and team growth.

Key Responsibilities
• Lead and mentor a high-performing team of verification engineers, fostering a culture of innovation and technical excellence
• Direct the architecture, design, and development of comprehensive verification IP solutions for advanced interfaces and protocols
• Collaborate with field engineers and customer teams to understand requirements, deploy solutions, and resolve complex technical issues
• Drive technical strategy and roadmap decisions for verification IP products, balancing customer needs with product vision
• Ensure quality standards through comprehensive testing, coverage analysis, and continuous improvement of verification methodologies
• Partner with cross-functional teams globally to integrate verification solutions with Questa RTL simulation and other Siemens tools

Qualifications

Required:
• Bachelor's degree in Electronics, Computer Engineering, or related field; advanced degree preferred
• 18+ years of professional experience in IP/VIP development, verification, or emulation with demonstrated technical leadership
• Expert-level proficiency in SystemVerilog and UVM with proven ability to architect and implement complex verification frameworks
• Deep hands-on experience with assertions, coverage metrics, test planning, BFM design, debug methodologies, and verification tracking tools
• Strong knowledge of at least one standard bus protocol (PCIe, CXL, USB, Ethernet, DDR, or CHI) with understanding of coherent and non-coherent architectures
• Proven leadership experience managing technical teams and mentoring engineers

Preferred:
• Experience with C/SystemC-based test development and system-level verification
• Understanding of CPU, GPU, display, network, and memory subsystems with knowledge of latency, bandwidth, and performance optimization
• Experience with emulation platforms and advanced verification methodologies

You'll Benefit From
Siemens offers a variety of health and wellness benefits to our employees. Details regarding our benefits can be found here: https://www.benefitsquickstart.com/siemens/index.html
The pay range for this position is $180,400 - $250,000 annually with a target incentive of 15-25% of the base salary. The actual wage offered may be lower or higher depending on budget and candidate experience, knowledge, skills, qualifications, and premium geographic location.