Job Description:

This position is part of the Advanced Development team focused on next-generation Artificial Intelligence and Machine Learning systems within Microchip’s FPGA Division. The team is driving innovation at the intersection of AI/ML algorithms, hardware-aware optimization, and intelligent systems deployment.

Microchip is a leading provider of low-power, high-reliability FPGA platforms used across embedded AI, autonomous systems, industrial automation, and aerospace applications. Building on this foundation, the organization is expanding its capabilities in AI-native architectures, on-device learning, and adaptive intelligent systems.

The successful candidate will join a core team that develops AI/ML-driven architectures and learning systems, collaborating with hardware, software, and systems engineering teams to co-design intelligent, adaptive FPGA-based platforms. This includes integration with heterogeneous compute elements such as embedded processors, accelerators, and secure execution environments.

Key Responsibilities

• Develop and evaluate AI/ML model architectures, including deep learning and deep reinforcement learning (DRL) systems.
• Explore reinforcement learning, neural architecture search, and hardware-aware model optimization.
• Contribute to system optimization pipelines balancing performance, power, latency, and cost.
• Develop AI/ML benchmarks, training/inference pipelines, and simulation environments.
• Build tools leveraging statistical modeling, graph-based learning, and optimization algorithms.
• Analyze data and collaborate across software, hardware, and product teams.
• Help define future AI/ML-enabled FPGA product directions.

Requirements/Qualifications:

• Bachelor’s, Master’s, or PhD in relevant technical disciplines.

• 0–4 years of experience in AI/ML, deep learning, or reinforcement learning.

• Strong programming skills in Python and/or C/C++ with ML frameworks.

• Familiarity with Linux development environments.

• Knowledge of ML algorithms, RL, statistics, and optimization.

• Interest in hardware/software co-design (FPGAs, ASICs, accelerators).

• Strong analytical and communication skills.

What Makes This Role Unique

• Work at the intersection of AI, ML systems, and hardware architecture.
• Exposure to full-stack innovation from algorithms to silicon.
• Opportunity to shape next-generation AI-enabled FPGA products.

Travel Time:

0% - 25%

Physical Attributes:

Feeling, Handling, Hearing, Other, Seeing, Talking, Works Alone, Works Around Others

Physical Requirements:

10% sitting, 10% walking, 80% sitting, 100% in doors; Usual business hours

Pay Range:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature. Find more information about all our benefits at the link below:

The annual base salary range for this position, which could be performed in the US, is $70,304 - $143,000.*