Your Team, Your Impact

Marvell Custom Solutions partners with the world's most advanced technology companies to architect and deliver next-generation custom silicon that powers AI infrastructure, cloud computing, and 5G networks. Our team drives innovation at the forefront of semiconductor design, working on cutting-edge System-on-Chips (SoCs) built in the most advanced process nodes (3nm, 2nm) that leverage best-in-class IP portfolios spanning high-speed SerDes (112G+), advanced die-to-die interconnects, custom HBM memory architectures, PCIe Gen 6/7, and CXL 3.0 technologies-all integrated using breakthrough advanced packaging techniques including 2.5D, 3D, and co-packaged optics.

What You Can Expect

• Lead DV, emulation, and pre-silicon verification execution across multiple programs with a zero-defect mindset
• Define DV scope, methodology, and verification strategies that scale across complex SoC programs
• Architect and drive the definition and implementation of DV testbench (TB) architectures
• Define execution timelines in close collaboration with stakeholders, set program goals, and take decisive action to keep execution on track
• Collaborate closely with Architecture, Design, DFT, PD, FW, and System teams to ensure successful product execution from specification through tape-out
• Lead tool evaluation and selection to continuously advance the DV toolset and flow
• Drive continuous productivity improvements through both incremental optimizations and forklift changes to the DV flow
• Monitor industry DV trends and adapt the organization to stay ahead of key developments, particularly in PCIE architectures and memory technologies (DDR, LPDDR, HBM)
• Hire, build, and retain a high-performance engineering team; address ongoing training, development, and career growth needs across the organization

What We're Looking For
Requirements

• Bachelor's degree in Computer Engineering, Electrical Engineering, or related field with 20+ years of related professional experience, OR Master's degree and/or PhD in Computer Science, Electrical Engineering, or related field with 15+ years of experience
• Strong understanding of the full ASIC development process, from architecture definition through tape-out and production
• Proven ability to lead and scale ASIC verification teams across global design centers
• Demonstrated track record of delivering high-quality, production-grade ASICs on time
• Solid understanding of SoC architecture, including processor cores, memory subsystems, and peripheral interfaces
• Strong cross-functional leadership skills with the ability to influence and drive alignment across Architecture, Design, DFT, PD, FW, and System teams
• Excellent communication, interpersonal, and presentation skills, with the ability to represent the DV organization to senior leadership and customers
• Highly motivated, self-driven, and naturally curious about emerging technologies and verification methodologies

Preferred Qualifications

• Good understanding of PCIe architectures and memory technologies including DDR, LPDDR, and HBM
• Experience with emulation platforms and pre-silicon validation strategies
• Familiarity with advanced verification techniques including formal verification, hardware-software co-verification, and post-silicon validation support
• Background in high-speed interface verification including 112G+ SerDes, PCIe Gen 6/7, CXL 3.0, or custom die-to-die interconnects

Expected Base Pay Range (USD)
197,400 - 292,150, $ per annum

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements
Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life's most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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