Company:Qualcomm Canada ULC
Job Area:Engineering Group, Engineering Group > ASICS Engineering
Minimum Qualifications:• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
High-Speed Interconnect (HSI) Digital Design Verification Engineer (Staff)Our HSI organization develops leading-edge high-speed SerDes IP for Qualcomm's diverse roadmap with a primary focus on High-Performance Compute and Data Center applications. We are looking for an experienced and enthusiastic
Digital Design Verification Engineer to join our dynamic team of talented innovators.
What you will do:- Own the end-to-end verification of new features and optimizations
- Verify designs which support next-generation protocols such as Ethernet and PCIe
- Prove designs for function, performance and power
- Employ AI-enabled tools and infrastructure to accelerate development
- Assess design requirements/specifications and devise verification plans
- Build/enhance testbenches and analyze simulation failures
- Integrate 3rd party VIPs for compliance testing of standard protocols
- Contribute towards the continuous improvement of verification methodologies and processes
- Work with technical and project managers to create development plans and schedules
- Take on opportunities to lead, plan, and coordinate tasks with team members
- Support post-silicon validation and bring-up activities including debug and documentation
- Collaborate cross-functionally with design verification, design integration, systems, analog, firmware/software, physical design, SoC, and project management teams
What you will need:- ASIC design verification experience including coding in Verilog/SystemVerilog
- An applied understanding of UVM and verification techniques
- Experience with constrained-random verification in SystemVerilog and UVM
- Formal Verification and Power-aware verification techniques
- Tools/languages: Verilog/System Verilog, Python, Perl, C/C++, GNU Make, EDA tools
- Working knowledge of scripting and the Linux/Unix environment
- Proven problem solving and analytical skills
- Proven effective communication and organizational skills
- Experience delivering multiple parallel programs on schedule
- Strong initiative and independently capable of driving tasks to completion
- Technical leadership skills to own new initiatives end-to-end
- Experience with Ethernet, PCIe, SerDes PHY, DSP, and mixed-signal IP is highly desirable
Pay range and Other Compensation & Benefits:$129,600.00 - $179,600.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer.
If you would like more information about this role, please contact Qualcomm Careers.
