Job Description Summary:
We are seeking an experienced DFT Engineer to join our team. The successful candidate will be responsible for developing and implementing testability solutions for complex digital ASICs, SoCs and SOTA processors. The DFT Engineer will work closely with cross-functional teams, including design, verification, and test engineering to ensure that our products are designed with testability in mind, and that test-related issues are addressed throughout the product development cycle. Key responsibilities will include DFT Architecture and Implementation, Testability Analysis, DFT Methodology Development, DFT Verification, and Test Pattern Generation.
Job Description:
Duties/Responsibilities
Design and simulate circuits at transistor-level to implement architecture and requirement specifications
Contribute to system-level design
Optimize hardware designs for performance, power, and cost
Evaluate the hardware feasibility of complex algorithms and requirements
Independently contribute to complex chip architectures and designs
Independently drive solutions to complex problems - develop requirements, propose ways forward when customer requirements are unclear or incomplete, and adapt appropriately to changes in requirements
Contribute to business development and proposal activities
Develop, document, and teach best practices to less experienced engineers
Perform or guide physical layout, including floor-planning, and simulate circuits using extracted parasitics.
Perform other duties as assigned
Skills/Abilities
Proficiency in integrated circuit design
Understanding of integrated circuits, semiconductors, and general computer architecture
Ability to write detailed design specifications
Ability to manage small technical teams
Excellent verbal and written communication skills
Excellent mathematical skills
Excellent organizational skills and attention to detail
Excellent time management skills with the proven ability to meet deadlines
Strong analytical and problem-solving skills
Ability to prioritize tasks
Demonstrate strong organization, planning, and time management skills to achieve program goals
Education
Experience
Additional Job Description:
Applicants selected for this position will be required to obtain and maintain a government security clearance.
Job Location - City:
Cambridge
Job Location - State:
Massachusetts
Job Location - Postal Code:
The US base salary range for this full-time position is
$82,300.00 - $220,000.00
Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target salaries for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Union ranges will be in compliance with the collective bargaining agreement's approved rates by location and role. Your recruiter can share more about the specific salary range for your preferred location during the hiring process. Please note that the compensation details listed in US role postings reflect the base salary only, and does not include bonuses or benefits.
Our work is very important to us, but so is our life outside of work. Draper supports many programs to improve work-life balance including workplace flexibility, employee clubs ranging from photography to yoga, health and finance workshops, off site social events and discounts to local museums and cultural activities. If this specific job opportunity and the chance to work at a nationally renowned R&D innovation company appeals to you, apply now www.draper.com/careers.
