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X In most instances, this position requires in-person interviews as part of the hiring process.
Minimum qualifications: - Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 4 years of experience in industry (e.g., Hardware) or equivalent research.
- Experience with low-power systems (e.g., dynamic and leakage, power estimation), data analytics and profiling.
- Experience in flow automation (Python, C, C , Gemini).
- Experience with data science.
Preferred qualifications: - Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- Experience in RTL design and low-power design techniques.
- Expertise in vendor tools such as PTPX, Ansys Power Artist, Synopsys Prime Power RTL.
- Familiarity with the concept of power management, DVFS.
- Familiarity with CPU benchmarking, performance analysis and study.
- Demonstrated knowledge of CPU microarchitecture and system level.
About the jobBe part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
US: $138000 - $197000 (USD) 15% bonus target equity benefits
Responsibilities - Recruit a talented individual contributor engineer to own and drive several activities related to CPU architecture and system level energy modeling, engaged performance and power analysis, power optimization, simulation and rollups.
- Develop a system level power model for battery life analysis and energy optimization.
- Collaborate with the SoC and CPU Power Teams on various power projections and requirements for our CPU. This includes silicon power capture and profiling of CPUs for benchmarks and other daily workloads.
- Perform workload analysis for battery life and tests definition for power analysis and optimization.
- Perform data mining analysis at the RTL and gate-level to define relevant micro-architectural transactions for high-level power estimation.
