Strong mixed-signal background with solid understanding of power circuits and digital control systems.
Proven experience in converting control algorithms into clean, synthesizable RTL (using HDL Coder or hand-coded Verilog/SystemVerilog).
Deep knowledge of digital PID implementation challenges including quantization and computational delay.
Familiarity with high-frequency power converter control and digital PWM modulators (DPWM).
Experience with mixed-signal verification flows (analog-digital co-simulation).
Good understanding of analog effects impacting digital control like loop delay and sensor non-idealities.
BSEE/MSEE or PhD with 8+ years of experience in power management ICs or high-performance mixed-signal design.
Responsibilities
Lead micro-architecture and RTL design for a Mixed-Signal chiplet focused on intelligent power optimization.
Micro-architect and own toplevel RTL for mixed-signal chip integrating analog circuits and logic functions.
Architect and implement digital control loops for high-frequency multi-phase IVRs.
Translate validated MATLAB/Simulink models into production-quality RTL using HDL Coder or manual coding.
Design and implement supporting digital blocks including ADC interfaces and DPWM.
Collaborate with analog designers on loop compensation and delay budgeting.
Analyze and optimize digital controllers for area, power, timing, and metastability in diverse conditions.
Benefits
Collaborative work environment that fosters innovation.
Opportunities for professional growth in cutting-edge technologies.
Access to advanced tools and resources for development.
Supportive team culture that values input and creativity.
Full Job Description
About the role
Lead the micro-architecture and RTL design for Mixed-Signal chiplet focused on intelligent power optimization solutions for AI and high-performance computing.
What you'll do
Micro-architect and own toplevel RTL for Mixed-signal chip with analog circuits, micro-controller and other logic functions
Architect, and implement digital PID / cascade control loops (voltage-mode, current-mode, or hybrid) for high-frequency multi-phase IVRs.
Develop micro-architecture and implement RTL for control of mixed-signal circuits
Translate validated MATLAB/Simulink controller models into production-quality RTL (Verilog / SystemVerilog) using HDL Coder or manual high-quality coding.
Design and implement supporting digital blocks: ADC interface, DPWM (digital PWM),
Collaborate closely with analog designers on loop compensation, sensor design, quantization effects, and delay budgeting.
Analyze and optimize for area, power, timing, and metastability in the digital controller across PVT corners.
Support silicon bring-up, debug, and controller on lab hardware.
WhatWe'reLooking For
Strong mixed-signal background: Solid understanding of power circuits and digital control systems, digital filters etc.
Proven experience converting control algorithms into clean, synthesizable RTL (HDL Coder or hand-coded Verilog/SystemVerilog).
Deep knowledge of digital PID implementation challenges: quantization, sampling effects, computational delay, fixed-point arithmetic, and limit cycling.
Familiarity with high-frequency power converter control and digital PWM modulators (DPWM).
Experience with mixed-signal verification flows (analog-digital co-simulation).
Good understanding of analog effects impacting digital control: loop delay, sensor non-idealities, inductor non-linearities, PDN resonances.
Proficiency in digital design tools: Synopsys VCS, Verdi, Design Compiler, PrimeTime (or equivalent Cadence flow).
BSEE / MSEE or PhD with 8+ years of relevant experience in power management ICs or high-performance mixed-signal design.
Nice to Have
Prior experience designing digital controllers for integrated voltage regulators (IVRs), point-of-load (PoL) converters, or high-current AI/HPC power delivery.
Experience with formal verification or assertion-based mixed-signal verification.
