Job Area:Engineering Group, Engineering Group > ASICS Engineering
General Summary:You will be joining one of the World's best Camera Design Solutions IP teams that delivers the Spectra ISP to various Snapdragon SoCs.
A successful candidate will work on developing implementation infrastructure for Camera IP delivered to various SoCs. The candidate will be responsible for various functions from RTL integration through physical design. As a member of the Camera team, the successful applicant will help integrate, implement, and develop state of the art Camera cores and will be working closely with the Camera development and physical design teams. The successful candidate will possess understanding of ASIC design flow and the challenges posed by advanced deep sub-micron technologies.
The Design Implementation Engineer will work in Qualcomm's Spectra Camera team and will be responsible for managing all aspect of front end implementation design. The role will also include working with execution driven teams for tape-outs by supporting new methodologies and new flows required to address better QoR like performance, power and area. This is a new headcount position.
The responsibilities will include the following:- RTL to GDS2 flow, tools and methodologies such as synthesis, static timing analysis, formal verification, physical design and ECO generation/verification
- Implementation and delivery of Camera cores from RTL to Netlist
- Identify areas for flow and process improvements
- RTL synthesis using physically aware tools
- Formal Verification and Low Power verification using industry standard tools for RTL-netlist and netlist-netlist checks
- Close design timing by running static timing analysis and constraints development at block and SoC Level
- Generate and verify ECOs for functional and timing fixes, working closely with the physical design team
- Low Power synthesis flows for multiple corners
- Strong scripting skills to automate flows, improve productivity, and support analysis/debug (e.g., for synthesis, STA, ECO, and verification workflows)
Minimum Qualifications:• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field.
Pay range and Other Compensation & Benefits:$90,100.00 - $135,100.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer.
If you would like more information about this role, please contact Qualcomm Careers.
