Company:Qualcomm Canada ULC
Job Area:Engineering Group, Engineering Group > ASICS Engineering
General Summary:As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional groups to determine product execution path.
New Position.Minimum Qualifications:• Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
What You'll Do - Deliver standards-compliant IP blocks or subsystems for use in PCIe Gen7 (and beyond) and CXL 4.0 (and beyond) FPGAs or ASICs.
- Lead ASIC or FPGA projects.
- Lead verification of IP block or subsystem.
- Streamline ASIC development process with advanced tools, AI-based approaches and scripts.
- Develop verification test plan.
- Architect, develop and document verification environments based on SystemVerilog and UVM.
- Develop and debug test cases against the RTL to complete the test plan.
- Issue and track bug reports from inception to closure.
- Develop script to augment development process.
- Mentor junior engineers.
What You'll Need- Msc/MEng with 7+ years of experience, or BSc/Beng with 10+ years of experience in ASIC or FPGA development.
- Strong communications Protocol Knowledge (PCIe, CXL, UALink, Ethernet).
- Deep experience and knowledge of SystemVerilog, UVM and Constrained Random - Coverage Driven methodologies.
- Strong experience with simulation tools.
- Strong experience with Unix/Linux Shell scripting and source code revisioning systems.
It'd Be Amazing If You Had- Experience in PCIe Gen5/6/7 or CXL 3.0/4.0 Physical Layer to Transaction Layer protocols.
- Experience in using PCIe/CXL VIP from Siemens/Avery, Cadence or Synopsys.
- Experience in using AI-based approaches to streamline various phases of verification flow.
- Experience in Perl, Python and TCL scripting.
About You- Excellent communication skills.
- Able to listen to and appreciate ideas and opinions that differ from yours.
- Extremely detail oriented.
- Superb analytical and problem-solving skills.
- Drives for consistency.
- Takes personal pride in high standard of outputs.
- Self-motivated and self-managing.
- Mentoring and coaching skills.
If you would like more information about this role, please contact Qualcomm Careers.
