ASIC Architect

Cerebras Systems

• $150K — $200K *
Sunnyvale, CA 94087In-Person
Consumer Technology
8 - 10 years of experience
Today
Be an Early Applicant
Job Overview by Ladders

Qualifications

  • Masters/PhD in Electrical/Computer Engineering
  • 10+ years of experience in performance analysis and modeling of GPUs, CPUs, or accelerator products
  • Strong foundation in computer architecture and high-level architectural trade-offs
  • Ability to develop performance models from scratch using Python or similar tools
  • Experience with micro-code performance bottlenecks and optimization techniques
  • Familiarity with how high-level workloads translate to micro-architecture
  • Knowledge of ML workload profiling techniques and model network architecture is beneficial

Responsibilities

  • Translate high-level architecture specifications into detailed micro-architecture requirements
  • Develop new features in performance and power modeling
  • Conduct PPA (Performance, Power, Area) trade-offs for architectural advancements
  • Derive insights for enhancing micro-architecture power efficiency
  • Analyze workloads to pinpoint bottlenecks and benchmark against competition
  • Collaborate with software teams on application-level modeling at the cluster level
  • Identify hardware acceleration opportunities at the kernel level

Benefits

  • Flexible work schedules
  • Opportunities for professional development
  • Access to advanced research and technology resources
  • Collaborative and innovative team environment
  • Supportive culture fostering work-life balance
Full Job Description
Responsibilities
  • Translate high level architecture spec to micro-architecture feature requirements
  • Bring up new features in the performance/power model
  • Perform comprehensive PPA trade-offs for new architectural features
  • Extract insights for new features and micro-architecture power efficiency
  • Profile workloads, identify bottlenecks and project competition performance for benchmarking
  • Engage with SW teams for end-end application level modeling at cluster level
  • Identify kernel level HW acceleration level opportunities

Qualifications
  • Masters/PhD in Electrical/Computer Engineering
  • 10+ years of experience across performance analysis and modeling across GPUs, CPUs or accelerator products
  • Strong background in computer architecture and key high level architectural trade-offs
  • Comfortable standing up new performance models from scratch in Python or similar analytical environments
  • Exposure to micro-code (kernel) performance bottlenecks and optimization techniques
  • Good understanding of how high-level workloads map to underlying micro-architecture is desired
  • Understanding of basic ML workload profiling techniques and model network architecture is preferred
* Ladders Estimates

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