Descriptions & RequirementsJob Description and Requirements
You Are You bring strong experience in analog and mixed-signal design, with a track record of delivering high-performance circuits in deep-submicron CMOS technologies. You understand the fundamental tradeoffs between power, noise, linearity, and jitter, and consistently make sound engineering decisions that lead to robust, manufacturable silicon.
What You'll Be Doing - Design and optimize analog and mixed-signal circuits for high-speed IP products at 100Gbps, 200Gbps, and beyond, including PLLs, SerDes analog front-end, clocking circuits, and data converters
- Perform transistor-level design and simulation across process, voltage, and temperature corners
- Supervise layout implementation, managing parasitics, matching, shielding, and current density
- Translate system-level specifications into detailed block-level requirements
- Support silicon bring-up, validation, and debugging activities
- Mentor team members and contribute to design methodology improvements
The Impact You Will Have - Play a key role in defining next-generation high-speed IP architectures and influencing product direction across multiple programs.
- Enable delivery of silicon-proven IP used in next-generation SoCs across high-performance computing, mobile, and automotive applications
- Shape architectural decisions and design methodologies for high-speed analog IP
- Improve product quality and time-to-market through robust design solutions
- Build team capability through mentorship and knowledge sharing
- Contribute to Synopsys' leadership in the semiconductor IP industry
What You'll Need - Master's with 3+ or PhD with 1+ years of experience in El ectrical Engineering or equivalent practical experience
- Hand-on experience of analog and mixed-signal IC design with expertis e in high-speed SerDes, PLL/CDR design, analog front-end, or data converters , architecture-level contribution
- Strong foundation in analog circuit principles, device physics, and transistor-level design using deep-submicron CMOS technologies
- Proficiency with HSPICE or other tools.
- Understanding of layout effects and post-layout verification
- Experience with silicon validation and lab debugging is a plus
Who You Are - You take ownership of your work while collaborating effectively with global teams
- You can interpret high-speed interface standards (e.g., SerDes) and translate system-level requirements (jitter, BER, bandwidth, power) into well-defined, designable block-level specifications.
- You apply strong circuit intuition and debug methodology to convergence issues, guiding engineers through root-cause analysis across biasing, loop stability, and device operation rather than prescribing superficial fixes.
- You understand and clearly communicate key design tradeoffs (e.g., power, noise, linearity, jitter) and can challenge constraints and specifications when system targets are not physically achievable.
- You exercise sound engineering judgment in simulation (corner selection, PVT coverage, Monte Carlo) and layout (parasitics, matching, shielding, current density), while maintaining clear, structured design documentation for long-term debug and reuse, and team knowledge sharing.
The Team You'll Be Part Of You will join a skilled analog and mixed-signal design team within Synopsys IPG in Markham. The team collaborates with colleagues across North America, Europe, and Asia to deliver industry-leading silicon IP solutions, focusing on high-speed interfaces, clocking solutions, and data converters.
Rewards and Benefits We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
