Architect, design, and implement advanced hardware solutions for CPU and interconnect IP, driving innovation and performance in RISC-V architectures while enhancing configurability and accelerating time-to-market for diverse applications.

Shape the future of high-performance SoC design verification. Lead verification strategies and drive quality across complex interconnect subsystems while collaborating with teams across architecture, RTL, and verification.

Pioneer verification strategies for a cutting-edge cache-coherent interconnect subsystem, driving quality across design verification teams and improving methodologies to meet the demands of high-performance SoC design.

Transform the future of RISC-V technology by designing innovative CPU and interconnect IP. Collaborate in a dynamic team to create customizable hardware solutions that accelerate time-to-market and drive market adoption across various applications.

Join a dynamic team to design cutting-edge CPU and interconnect IP, enabling rapid RISC-V adoption across diverse applications. Enhance existing infrastructure while innovating new hardware solutions in a fast-paced, collaborative environment.