Pioneer innovative IP validation processes, ensuring high-performance PCIe/CXL subsystems through comprehensive verification, collaboration with cross-disciplinary teams, and advanced debugging to support cutting-edge custom chip development for cloud and AI.

Drive the design and integration of PCIE/CXL subsystems, collaborating with cross-functional teams to define architectures, implement RTL, and ensure high-quality silicon delivery for cloud and data center solutions.

Transform the future of SoC products by leading end-to-end PCIe/CXL and Memory subsystem RTL design, driving high performance and compliance across technologies. Collaborate with cross-functional teams to ensure rapid delivery and quality assurance.

Unlock your potential as you drive cross-functional reliability testing, collaborating with key stakeholders to ensure top-tier product quality and robust designs for innovative connectivity solutions.

Join a team that's at the forefront of innovation, supporting electronics lab operations and engineering development. Collaborate with engineers to ensure efficient EVK system checkout, debugging, and maintenance in a dynamic environment.