Drive the end-to-end verification of advanced PCIe and CXL subsystems, ensuring compliance across complex SoC designs. Collaborate with cross-functional teams to mentor engineers and enhance verification methodologies for optimal performance.

Transform the landscape of PCIE/CXL subsystem design, ensuring quality and performance by driving micro-architecture, RTL implementation, and integration. Collaborate cross-functionally, mentoring talent while delivering state-of-the-art solutions.

Empower our team by leading verification of PCIe/CXL subsystems, enhancing product quality and time-to-market through innovative testing and collaboration across multiple engineering disciplines.

Transform the landscape of cutting-edge technology by leading verification efforts in high-speed memory interfaces. Collaborate with cross-functional teams to ensure robust design and compliance, accelerating time-to-market for advanced SoC products.

Pioneer innovative IP validation processes, ensuring high-performance PCIe/CXL subsystems through comprehensive verification, collaboration with cross-disciplinary teams, and advanced debugging to support cutting-edge custom chip development for cloud and AI.