DFT Engineer professionals advise upon, design, develop and/or deliver technology solutions that support best practice business changes:
Work with the Silicon teams to document the DFT specifications and define the requirements for both IP and large scale SoC level designs
Define and implement DFT architecture and infrastructure
Work with EDA providers to implement well automated and robust DFT flows
Develop and drive execution of advanced DFX (DFT/Design-For-Debug) methodologies, with increased focus on debug support
Generate structural (ATPG), BSD & MBIST test vectors, analyze and improve coverage/test time/test cost
Work with designers on STA, physical, power and logical issues impacting DFT
Support STA efforts through development and verification of test mode constraints.
Work with test engineers to bring up test vectors on silicon
Work with lab bring-up teams to bring up test vectors in the lab environment
Manage schedules, deliverables and support internal and external cross-functional/cross-organizational engineering efforts
Basic Qualifications:
Minimum of 3 - 10 years of DFT experience:
Industrial standards and practices in DFT, including ATPG, JTAG, MBIST and trade-offs between test quality and test time
Developing DFT specifications
Industry standard DFT and design tools
Debugging ATPG/MBIST patterns
STA constraints and their interaction with DFT
Bachelor's Degree or equivalent work experience (12 years) or an Associate's Degree with 6 years of work experience
Preferred Qualification:
• Experience with Synopsys DFT tools (Tetramax, DFT compiler, BSD compiler, Formality, Spyglass, VCS, PrimeTime)
• Experience with JTAG and IEEE standards 1687, 1149.1 and 1149.6.
