info_outline X In most instances, this position requires in-person interviews as part of the hiring process.Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Mountain View, CA, USA; San Diego, CA, USA. Minimum qualifications: • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience • 4 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog. • Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power design techniques. Preferred qualifications: • Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture. • Knowledge of accelerators (e.g., Machine Learning or GPUs) or similar high performance designs. About the job Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $138000 - $197000 (USD) 15% bonus target equity benefits Learn more about benefits at Google . Responsibilities • Use simulation/emulation/power analysis tools and techniques to ensure power and performance meet defined specifications. • Develop, implement, and maintain design blocks or components/part of a hardware product, and integrate design blocks or components/parts to create product subsystems. • Engage with Verification and Silicon Validation teams to ensure functionality of the design • Provide input on synthesis, timing closure, and Physical Design of digital blocks • Take a leadership role on technical project teams and set technical direction.