Job Title: Technical Director - Digital IC Design

Posting Start Date: 6/30/26

Job Location(s): Hillsboro, San Jose

Requisition ID: 77708

Job Description:

Description

We are seeking an experienced and visionary Technical Director to drive advanced, mixed-signal SOC (Systems On A Chip) development. In this key leadership role, you will drive the architecture, design, and implementation of cutting-edge digital systems and signal processing hardware for next-generation systems. You will play a pivotal role in shaping the technical direction of our projects, mentoring a team of engineers, and ensuring the successful delivery of high-performance, power-efficient designs.

We are a passionate and dedicated team of world-class digital, analog, mixed-signal, and firmware engineers committed to building the next generation of wireless and audio SOCs. This position is for an experienced and equally passionate engineer interested in excellent personal and professional growth opportunities.

Note: This position will be on-site in our San Jose, CA or Hillsboro, OR site locations.

Responsibilities

This is an exciting opportunity for a seasoned professional with deep expertise in digital IC design and hardware DSP to make a significant impact on innovative product development in industries such as telecommunications, consumer electronics, or automotive.

Technical Leadership:

• Define and drive the technical strategy for digital IC design with a focus on hardware DSP development.
• Lead the architecture and design of high-performance, low-power DSP blocks for ASICs, FPGAs, and SoCs.
• Ensure that designs meet performance, power, area, reliability and testability requirements.
• Stay ahead of industry trends and emerging technologies to guide innovation.

Project Management:

• Oversee multiple concurrent projects from concept to production.
• Collaborate with cross-functional teams (e.g., system architects, software engineers, verification teams) to ensure seamless integration of DSP hardware into larger systems.
• Manage project schedules, deliverables, and risks to ensure timely execution.

Team Leadership & Mentorship:

• Lead and mentor a high-performing team of digital IC design engineers.
• Foster a culture of technical excellence, collaboration, and continuous learning.
• Provide guidance on best practices for RTL design, synthesis, verification, and physical implementation.

Design & Development:

• Lead the development of custom DSP algorithms and their efficient implementation in hardware.
• Optimize designs for performance (e.g., SNR/throughput/latency), power efficiency, and silicon area.
• Drive the use of advanced tools and methodologies for RTL design (e.g., Verilog/SystemVerilog/SystemC), synthesis, timing analysis, and formal verification.

Collaboration & Communication:

• Collaborate with customers and internal stakeholders to understand requirements and translate them into technical specifications.
• Communicate progress, challenges, and solutions effectively to both technical teams and executive leadership.

Quality Assurance:

• Ensure robust verification strategies are in place for all designs (e.g., functional verification, formal methods).
• Collaborate with physical design teams to address timing closure and DFT (Design for Testability) requirements.

Required Experience and Skills

Required Qualifications:

• Education: Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field (Master's or Ph.D. preferred).
• Experience: 12+ years of experience in digital IC design with a focus on hardware DSP development.
• Proven track record of delivering complex ASICs or SOCs into production.
• Experience leading teams or projects in a technical leadership role.

Technical Expertise:

• Deep understanding of DSP algorithms (e.g., FFTs, filters, modulation/demodulation) and their hardware implementation.
• Experience with hardware/software partitioning of systems and algorithms.
• Strong knowledge of RTL design using Verilog/SystemVerilog/SystemC.
• Proficiency in synthesis tools, timing analysis tools, and simulation tools.
• Familiarity with FPGA prototyping flows and tools.
• Experience with low-power design techniques and trade-offs.
• Understanding of physical design concepts such as floorplanning, clock tree synthesis (CTS), and timing closure.

Soft Skills:

• Strong leadership skills with the ability to inspire and mentor teams.
• Excellent problem-solving skills with attention to detail.
• Exceptional communication skills for both technical discussions and executive-level presentations.

Desired Experience and Skills

• Experience working on wireless communication systems and audio processing systems.
• Familiarity with machine learning accelerators or AI hardware implementations.
• Knowledge of advanced process nodes and their challenges.
• Experience with formal verification tools like JasperGold or similar.
• Exposure to digital interface protocols such as USB, I2C, SPI, I2S, TDM, PDM.

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The typical base pay range for this role across the U.S. is currently USD $170,100 - $339,500 per year. Starting base pay will depend on relevant experience and skills, training and education, business needs, market demands, the ultimate job duties and requirements, and work location. Skyworks has different base pay ranges for different work locations in the U.S. Benefits include access to healthcare benefits (including a premium-free medical plan option), a 401(k) plan and company match, an employee stock purchase plan, paid time off (including vacation, sick/wellness, parental leave), among others. Employees are eligible to participate in an incentive plan, and certain roles are also eligible for additional awards, including recognition and stock. These incentives and awards are based on individual and/or company performance.