General Dynamics

Systems Engineering Integration & Test Engineer - TIDES FPGA (PIE)

General Dynamics$82K *
Aerospace & Defense
Less than 5 years of experience
Job Overview by Ladders

Qualifications

  • Bachelor's degree in Systems Engineering, Electrical Engineering, Computer Engineering, or a related field.
  • Preferred: TS/SCI security clearance at hire or ability to obtain it.
  • Familiarity with digital logic, electronics, embedded systems, or hardware/software integration.
  • Experience with FPGA design, SystemVerilog, or VHDL is an asset.
  • Comfort with lab equipment and software tools in a Linux environment.

Responsibilities

  • Support the PIE team in the development and maturation of the Payload Verification Platform (PVP).
  • Integrate COTS and custom FPGA boards along with payload hardware into a shared development environment.
  • Assist in early payload emulation, interface testing, and hardware bring-up activities.
  • Collaborate with cross-disciplinary teams to translate integration needs into platform capabilities.
  • Perform FPGA development tasks such as RTL updates and simulations under mentorship.
  • Support real-time test functions for payload communication and command scheduling.
  • Document test setups and integration processes.

Benefits

  • Flexible work environment.
  • Opportunity for hands-on engineering experience.
  • Access to advanced lab equipment and software tools.
  • Potential for career growth in systems integration and testing.
Full Job Description
Basic Qualifications

Basic Qualifications:Requires a Bachelor's degree in degree in Systems Engineering, Electrical Engineering, Computer Engineering, or a related technical field. 

 

CLEARANCE REQUIREMENTS: Department of Defense TS/SCI security clearance is preferred at time of hire. Candidates must be able to obtain a TS/SCI clearance within a reasonable amount of time from date of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required.

 

WorkplaceFacility 100%, Flex

Responsibilities for this Position

Job Description: 

Systems Engineering Integration & Test Engineer - TIDES FPGA (PIE)

 

ROLE AND POSITION OBJECTIVES:

As a Systems Engineering Integration & Test Engineer - TIDES FPGA, you will be a member of the Payload Integration and Evolution (PIE) team within SEIT’s organization. The PIE team develops and evolves the Payload Verification Platform (PVP), a hardware development environment made up of COTS and custom FPGA boards, development kits, and supporting infrastructure used to emulate spacecraft payload behavior for early integration, risk reduction, and test software development.  In this role, you will support FPGA design, RTL development, simulation, interface integration, and lab bring-up for the PVP. Your work will help bridge test equipment with units under test, enable real-time functions such as packet timestamping and precision command scheduling, and mature the platform as payload programs move from early development toward verification and flight readiness.

 

Key Responsibilities

  • Support the Payload Integration and Evolution (PIE) team within SEIT’s TIDES organization in developing and maturing the Payload Verification Platform (PVP)
  • Help integrate COTS and custom FPGA boards, development kits, test equipment, and payload hardware into a shared hardware development environment
  • Support early payload emulation, interface testing, hardware bring-up, and risk reduction activities
  • Work with systems, electrical, software, test, and FPGA engineers to understand integration needs and translate them into test platform capabilities
  • Assist with FPGA development tasks such as RTL updates, simulation, interface checkout, and lab validation under guidance from experienced engineers
  • Support real-time test functions such as interface bridging, packet timestamping, command scheduling, and payload communication emulation
  • Debug integration issues using lab equipment, software tools, waveform captures, and structured engineering investigation
  • Document test setups, bring-up procedures, interface behavior, and lessons learned

Preferred Skills & Experience

  • Bachelor’s degree in Systems Engineering, Electrical Engineering, Computer Engineering, or a related technical field
  • Foundational understanding of digital logic, electronics, embedded systems, or hardware/software integration
  • Coursework, internship, lab, or project experience with FPGA design, SystemVerilog, VHDL, or FPGA development kits is a plus
  • Interest in hardware bring-up, lab debug, payload integration, and hands-on engineering work
  • Familiarity with lab equipment such as oscilloscopes, logic analyzers, JTAG, protocol analyzers, or similar tools
  • Basic understanding of communication interfaces such as Ethernet, SPI, UART, JESD204, or other board-level protocols
  • Comfortable working with software tools, scripts, Linux command-line environments, or Git-based workflows
  • Ability to work with multidisciplinary teams and communicate across systems, hardware, software, and test disciplines
  • Willingness to learn FPGA toolchains, RTL development, simulation, timing concepts, and hardware integration practices

What Sets You Apart

  • You are curious about how the whole payload test system fits together, from hardware and FPGAs to software and test equipment
  • You enjoy hands-on lab work and want to build real engineering judgment through bring-up, debug, and integration
  • You have experience with FPGA projects, digital design coursework, embedded systems, robotics, communications, or hardware test platforms
  • You are comfortable learning new tools and asking good technical questions
  • You communicate clearly with engineers from different disciplines and can turn ambiguity into action
  • You are interested in using automation, scripting, and AI tools to improve engineering workflows
  • You want to grow into an engineer who can help define, build, debug, and evolve payload verification platforms over time
Salary NoteThis estimate represents the typical salary range for this position based on experience and other factors (geographic location, etc.). Actual pay may vary. This job posting will remain open until the position is filled. Combined Salary RangeUSD $82,200.00 - USD $82,200.00 /Yr.

About General Dynamics

General Dynamics is involved in business aviation; land and expeditionary combat vehicles and systems, armaments, and munitions; shipbuilding and marine systems; and mission-critical information systems and technologies. General Dynamics has four main business segments. Aerospace designs, develops, manufacturers and services a comprehensive offering of advanced business-jet aircraft. Combat Systems specializes in producing, supporting and sustaining land and expeditionary combat systems for the U.S. military and its allies. Marine Systems designs, builds and supports submarines and a variety of surface ships for the U.S. Navy and commercial customers. The Information Systems and Technology group offers a breadth and depth of technology and service capabilities that support a wide range of government and commercial needs, including systems integration expertise; hardware and software products; and engineering, management and support services.

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Join the dynamic team at General Dynamics, a leader in global defense, aerospace, and technology services. As a pivotal player in innovation and security, General Dynamics offers unparalleled job opportunities for professionals eager to advance their careers in a cutting-edge environment.

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Learn more about General Dynamics
Size
103,100 employees
Market Cap
$67.9 billion
Industry
Net Income
$3.1 billion
Founded
1952
5 Year Trend
+4.7%
Revenue
$37.9 billion
NASDAQ

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