System Architect

Kandou Bus

$175K — $210K *
Telecommunications & Hardware
11 - 15 years of experience
Job Overview by Ladders

Qualifications

  • 12+ years in high-speed interconnect technologies like retimer and coherent optics.
  • Experience in a senior role such as System Architect or Chief Architect on products 100G/lane or more.
  • Has authored specifications for both product and silicon in a commercial environment.
  • Fluency with PAM4 link training, FEC, and on-die telemetry specifications.
  • Knowledgeable in traceability tools like DOORS or JAMA.

Responsibilities

  • Own the SoC and Product Specification stack for a 1.6T retimer SoC.
  • Author and maintain normative specifications for various engineering teams.
  • Ensure compliance with standards like IEEE 802.3ck and OIF CEI-112G.
  • Negotiate customer specifications with hyperscalers and strategic partners.
  • Oversee qualification test point and thermal envelope commitments.

Benefits

  • Opportunities for professional growth in cutting-edge technology.
  • Engagement with high-profile customers and strategic platforms.
  • Work alongside experts in high-speed interconnect fields.
  • Exposure to various engineering disciplines and collaboration across teams.
Full Job Description
  • Own the SoC and Product Specification stack for a 1.6T retimer SoC and the AEC product it enables, at 224G/lane PAM4.
  • You will author and maintain normative specifications (SHALL/MUST/SHOULD/MAY language with REQ-ID traceability) that RTL, firmware, software, SI/PI, manufacturing, qualification, and customer engineering teams execute against.
  • Standards scope spans IEEE 802.3ck/dj, OIF CEI-112G/224G, OSFP MSA, CMIS 5.x, EIA-364, JEDEC JESD22/51.
  • You will represent architecture in hyperscaler and strategic platform customer specification negotiation, including qualification test point, FEC telemetry, CMIS vendor-page, and thermal envelope commitments.
    Required:
  • 12+ years in shipping high-speed interconnect (retimer, gearbox, PHY, AEC, AOC, coherent optics, SerDes-centric networking silicon).
  • Prior System Architect, Chief Architect, or Principal Systems Engineer role on a shipping 100G/lane or higher product.
  • Direct authorship of at least one product spec and one silicon spec on a shipping product.
  • PAM4 link training, FEC, and on-die telemetry fluency at the specification level.
  • DOORS / JAMA / equivalent traceability tooling.

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