Staff Engineer, Physical Design

Tenstorrent • $100K — $500K *
Information Technology
Less than 5 years of experience
Job Overview by Ladders

Qualifications

  • BS/MS/PhD in EE/ECE/CE/CS with experience in synthesis, PnR, and timing closure.
  • Deep expertise in SOC/ASIC physical design with successful tapeout history.
  • Proficient with industry-standard tools like Innovus, PrimeTime, RedHawk.
  • Experience with scripting languages such as Tcl, Perl, or Python.
  • Knowledge of advanced node challenges and low-power design techniques.

Responsibilities

  • Own the complete implementation flow from synthesis to tapeout.
  • Collaborate closely with RTL engineers for PPA optimization.
  • Debug complex design issues across multiple hierarchies.
  • Drive physical design requirements from architecture through signoff.
  • Optimize performance, power, and area with innovative techniques.

Benefits

  • Highly competitive compensation package.
  • Flexible hybrid work model from multiple locations.
  • Opportunity to work with world-class engineers.
  • Potential for professional growth within cutting-edge AI computing.
Full Job Description
Tenstorrent is seeking talented Physical Design Engineers to implement high-performance blocks for our industry-leading CPU and AI/ML architectures. You'll own the complete implementation flow from synthesis to tapeout, working alongside world-class engineers to push the boundaries of performance, power, and area. If you're passionate about crafting silicon that powers the future of AI computing and thrive on solving complex design challenges, we want you on our team.

This role is hybrid, based out of Austin, TX, Santa Clara, CA or Fort Collins, CO.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are
  • A hands-on engineer with deep expertise in SOC/ASIC physical design and a track record of successful tapeouts.
  • Passionate about optimizing PPA through innovative implementation techniques and close RTL collaboration.
  • Strong problem solver who excels at debugging complex issues across design hierarchies.
  • Collaborative team player who thrives in fast-paced, technically challenging environments.


What We Need
  • BS/MS/PhD in EE/ECE/CE/CS with proven experience in synthesis, PnR, and timing closure on taped-out designs.
  • Expertise with industry-standard tools (Innovus, PrimeTime, RedHawk) and scripting languages (Tcl, Perl, Python).
  • Deep understanding of advanced node challenges and low-power design techniques (power gating, multi-Vt, voltage scaling).
  • Experience driving physical design requirements from early architecture through final signoff.


What You Will Learn
  • How to implement cutting-edge AI accelerators and high-performance CPUs on the most advanced process nodes.
  • Innovative PPA optimization techniques and methodologies for next-generation chiplet architectures.
  • End-to-end ownership from flow development to signoff in collaboration with architecture and IP teams.
  • Direct impact on products that are redefining the landscape of AI and high-performance computing.


Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits.

About Tenstorrent

Tenstorrent is a semiconductor company that designs and develops computer processors for artificial intelligence and machine learning applications. The company's processors are designed to be energy-efficient and scalable, and are used by a range of businesses, from small startups to large enterprises. Tenstorrent was founded in 2016 and is headquartered in Toronto, Ontario.
Learn more about Tenstorrent
Size
51 employees
Industry
Founded
2016

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