Staff Design Verification Engineer

Talentlab

$100K — $130K *
Enterprise Technology
8 - 10 years of experience
Job Overview by Ladders

Qualifications

  • Bachelor's or Master's degree in Computer Science, Electrical Engineering, or related field
  • Minimum of 9 years of ASIC design verification experience
  • Strong hands-on experience building reusable testbenches
  • Proficiency in SystemVerilog and UVM
  • Familiarity with leading EDA tools and digital verification methodologies
  • Hybrid role based in Ontario, preference for candidates near GTA or Ottawa

Responsibilities

  • Architect, design, and verify DSPs with high-speed mixed-signal PHYs like PCIe and Ethernet
  • Contribute to protocol development for various new variants across multiple focus areas
  • Build scalable UVM testbench components for complex RTL and firmware verification
  • Demonstrate understanding of SerDes and DSP cores; write test cases for component control
  • Own full verification lifecycle from plans to implementation and tape-out sign-off
  • Collaborate with design team to define verification requirements and key feature scope
  • Mentor junior engineers to foster technical excellence

Benefits

  • Opportunity to work in a hybrid environment
  • Engagement in various innovative projects
  • Chance to mentor and develop junior engineers
  • Participation in protocol development across multiple focus areas
  • Exposure to cutting-edge technology and methodologies
Full Job Description
Staff Design Verification Engineer

What You'll Do
  • Architect, design, and verify DSPs using high-speed mixed-signal PHYs such as PCIe and Ethernet.
  • Contribute to protocol development across various new variants-roles available across multiple focus areas.
  • Build scalable UVM testbench components for verifying complex RTL and firmware functionality.
  • Demonstrate in-depth understanding of SerDes and DSP cores; write test cases to optimize component control.
  • Own the full verification lifecycle-from creating and reviewing verification plans to implementation and sign-off for tape-out.
  • Collaborate with the design team to define verification requirements and scope of key features.
  • Mentor junior engineers and contribute to a culture of technical excellence.

What You'll Need
  • Bachelor's or Master's degree in Computer Science, Electrical Engineering, or a related discipline.
  • Minimum of 9 years of ASIC design verification experience.
  • Strong hands-on experience building reusable testbenches with advanced debugging expertise.
  • Proficiency in SystemVerilog and UVM.
  • Familiarity with leading EDA tools and methodologies used in digital verification.
  • This is a hybrid role based in Ontario, with a preference for candidates located near the GTA or Ottawa.

Bonus Points For
  • Experience with SerDes.
  • Knowledge of Ethernet and/or PCIe protocols.
  • Familiarity with CMIS standards.
  • Understanding of protocols such as I2C, SPI, USB, NVMe, APB, AHB, etc.
  • Experience working with RISC-V microcontrollers.

Please reach out to [redacted] with your resume if you're a fit for the position and interested in learning more.

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