Palo Alto Networks

Sr Staff Electronic Design Verification Test (EDVT Engineer Hardware

Palo Alto Networks$143K — $231K *
Telecommunications & Hardware
5 - 7 years of experience
Job Overview by Ladders

Qualifications

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
  • 5+ years of hands-on experience in electronic product validation or hardware design.
  • Strong understanding of hardware architecture and schematic design interpretation.
  • Expertise with high-speed digital oscilloscopes and other lab equipment.
  • Proficient in Python or similar languages for automation and data analysis.
  • Proven track record in debugging complex system-level issues under tight deadlines.
  • Exceptional communication skills for conveying technical findings to diverse teams.

Responsibilities

  • Lead development and execution of EDVT test plans for complex circuit boards.
  • Validate high-speed interfaces and power delivery networks with rigorous hands-on testing.
  • Collaborate with other teams to identify and resolve design issues.
  • Design automated test setups to enhance testing efficiency and coverage.
  • Utilize advanced lab equipment to troubleshoot hardware anomalies during testing.
  • Support transition from product prototype to mass production with manufacturers.
  • Document comprehensive test reports and validation summaries for reviews.

Benefits

  • Ownership of product quality for innovative technology solutions.
  • Collaborative culture that promotes learning and innovation.
  • Opportunities for career growth into hardware architecture or engineering leadership.
Full Job Description
Job Summary

About the Role

We are seeking a highly skilled and motivated Senior to Principal EDVT Engineer to join our hardware engineering team. In this role, you will lead the end-to-end design verification, validation, and testing of complex electronic systems, high-speed interfaces, and power delivery networks. You will be instrumental in bridging the gap between hardware design and mass production, ensuring our products meet the highest standards of signal integrity, power integrity, and regulatory compliance.

If you thrive in a fast-paced environment, love troubleshooting complex hardware anomalies, and want to own the verification strategy for next-generation hardware, we want to hear from you.

Key Responsibilities
  • Test Strategy & Execution: Lead the development, execution, and optimization of EDVT test plans for complex circuit boards (PCAs) and full-system hardware.
  • Signal & Power Integrity: Perform rigorous hands-on validation of high-speed interfaces (e.g., PCIe, USB, DDR, I2C, SPI) and power delivery networks (DC-DC converters, ripple, transient response).
  • Cross-Functional Collaboration: Partner closely with Hardware Design, Signal Integrity (SI), Firmware, and Component Quality teams to root-cause design issues and validate fixes.
  • Lab Automation: Design and implement automated test setups using Python or LabVIEW to increase test coverage, repeatability, and efficiency.
  • Failure Analysis: Utilize advanced lab equipment to debug complex hardware anomalies, component failures, and unexpected system behaviors during EVT and DVT phases.
  • NPI & Manufacturing Support: Collaborate with contract manufacturers (CMs) and Joint Development Manufacturers (JDMs) to transition products from prototype to mass production.

Documentation: Author comprehensive test reports, white papers on critical design bugs, and validation summaries for executive and engineering review.

Qualifications
  • Education: Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical discipline.
  • Experience: 5+ years of hands-on experience in electronic product validation, EDVT, or hardware design engineering.
  • Technical Mastery: Deep understanding of hardware architecture, schematic design reading, and PCB layouts.
  • Lab Expertise: Expert-level proficiency with high-speed digital oscilloscopes, spectrum analyzers, protocol analyzers, logic analyzers, and digital multi-meters (DMMs).
  • Automation: Strong scripting skills in Python (or similar languages) for test automation and data analysis.
  • Problem Solving: Proven track record of debugging complex physical-layer and system-level issues under tight timelines.
  • Communication: Exceptional verbal and written communication skills, with the ability to distill complex technical findings into actionable insights for cross-functional teams.
Preferred Qualifications
  • Experience with automated test frameworks and data visualization tools.
  • Familiarity with environmental testing (Thermal, Shock/Vibe) and compliance standards (EMI/EMC, Safety).
  • Experience managing or guiding junior test engineers or technicians.


Why Join Us?
  • Impact: You will have direct ownership of product quality and reliability for cutting-edge technology.
  • Culture: A collaborative, engineering-first environment where continuous learning and innovation are celebrated.
  • Growth: Opportunities to expand your scope into hardware architecture, advanced signal integrity simulation, or engineering leadership.


Compensation Disclosure

The compensation offered for this position will depend on qualifications, experience, and work location. For candidates who receive an offer at the posted level, the starting base salary (for non-sales roles) or base salary + commission target (for sales/com-missioned roles) is expected to be the annual range listed below. The offered compensation may also include restricted stock units and a bonus. A description of our employee benefits may be found here.

$143,100.00 - $231,475.00/yr

Is role eligible for Immigration Sponsorship?: Yes

About Palo Alto Networks

Palo Alto Networks, Inc. is an American multinational cybersecurity company with headquarters in Santa Clara, California. Its core products are a platform that includes advanced firewalls and cloud-based offerings that extend those firewalls to cover other aspects of security. The company serves over 70,000 organizations in over 150 countries, including 85 of the Fortune 100. It is home to the Unit 42 threat research team and hosts the Ignite cybersecurity conference.
Learn more about Palo Alto Networks
Size
11,870 employees
Market Cap
$42.6 billion
Industry
Net Income
-$368.2 million
Founded
2005
5 Year Trend
+25.7%
Revenue
$3.7 billion
NASDAQ

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