Sr. Engineer, RTL Implementation

Tenstorrent$100K — $500K *
Consumer Technology
Less than 5 years of experience
Job Overview by Ladders

Qualifications

  • 5-7 years of experience in high-performance physical design
  • Proficiency in RTL coding (Verilog/VHDL)
  • Familiarity with simulation and power analysis tools
  • Skilled in synthesis and place and route tools
  • Background knowledge in CPU micro-architecture

Responsibilities

  • Perform synthesis and initial place and route for both new and legacy designs
  • Collaborate with core micro-architects to optimize configurations for power, performance, and area (PPA)
  • Innovatively drive physical design experiments and evaluate results
  • Enhance physical design environments, tools, and methodologies

Benefits

  • Hybrid work model based in Austin, TX or Santa Clara, CA
  • Exposure to end-to-end CPU design and optimization
  • Hands-on experience with cutting-edge CPU design challenges
  • Integration of open-source tools to improve design processes
  • Highly competitive compensation package
Full Job Description
We are looking for a talented engineer to join our CPU design team to iterate through front-end CAD flows on multiple process technologies while working closely with core micro-architects to refine CPU core configurations and optimizing PPA. You'll work on a CPU based on RISC-V ISA, collaborating with DV, PD, RTL and performance teams to deliver a functional, timing, and power-converged design. This role ishybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. **Who You Are** - Experienced in high-performance physical design. - Proficient in RTL coding (Verilog/VHDL) and familiar with industry-standard tools for simulation and power analysis. - Skilled in synthesis, place and route tools including flows and physical design methodology. - Background in CPU micro-architecture. **What We Need** - Perform synthesis and initial place and route for new and legacy designs. - Collaborate closely with core micro-architects to optimize core configurations for best PPA. - Use innovative techniques to optimize power, performance, and area while driving physical design experiments and evaluating results. - Enhance physical design environment, tools, and methodologies to improve development efficiency. **What You Will Learn** - End-to-end exposure to CPU design from microarchitecture through timing and power convergence. - Hands-on experience optimizing CPU designs and driving PPA improvement. - Integration of open-source and industry-standard tools to improve physical flows and results. - Work in a deeply technical, highly collaborative team solving cutting-edge CPU design challenges. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits.

About Tenstorrent

Tenstorrent is a semiconductor company that designs and develops computer processors for artificial intelligence and machine learning applications. The company's processors are designed to be energy-efficient and scalable, and are used by a range of businesses, from small startups to large enterprises. Tenstorrent was founded in 2016 and is headquartered in Toronto, Ontario.
Learn more about Tenstorrent
Size
51 employees
Industry
Founded
2016

Similar Jobs

More Jobs at Tenstorrent

More Consumer Technology Jobs

Find similar Sr. Engineer, RTL Implementation jobs: