Teradyne

Sr. Digital ASIC Design Engineer (TERADYNE, Agoura Hills, CA)

Teradyne$154K — $247K *
Telecommunications & Hardware
8 - 10 years of experience
Job Overview by Ladders

Qualifications

  • BSEE required; MSEE preferred in a related field.
  • 8+ years of experience in digital ASIC or SoC design.
  • Strong RTL design skills in Verilog/SystemVerilog.
  • Expertise in designing complex digital logic subsystems.
  • Deep understanding of complete ASIC development flows.
  • Experience with third-party and custom IP integration.
  • Strong problem-solving and debugging skills.

Responsibilities

  • Contribute to the architecture and design of digital subsystems.
  • Implement and validate designs for next-gen mixed-signal ASICs.
  • Collaborate with cross-functional teams during design activities.
  • Take ownership of critical RTL design from concept to silicon.
  • Deliver digital designs meeting performance, power, and reliability requirements.
  • Support first-pass silicon success through validation activities.

Benefits

  • Comprehensive health and well-being programs including medical, dental, and vision.
  • Flexible Spending Accounts.
  • Retirement savings plans and life/disability insurance.
  • Paid vacation and holidays.
  • Tuition assistance programs.
Full Job Description
Opportunity Overview

Teradyne's Digital ASIC Group is seeking a Senior Digital ASIC Design Engineer to join our engineering team in Agoura Hills, California. In this role, you will contribute to the architecture, design, implementation, and validation of complex digital subsystems used in next-generation mixed-signal ASICs for semiconductor test applications.

Working closely with system architects, analog designers, verification engineers, and physical design teams, you will take ownership of critical RTL design activities from concept through silicon bring-up. You will be responsible for delivering robust, high-quality digital designs that achieve performance, power, area, and reliability targets while supporting first-pass silicon success.

Required Qualifications
  • BSEE required; MSEE preferred in Electrical Engineering, Computer Engineering, or a related field.
  • 8+ years of digital ASIC or SoC design experience.
  • Strong RTL design expertise using Verilog and/or SystemVerilog.
  • Experience designing complex digital logic including:
    • State machines
    • FIFOs and buffering architectures
    • High-speed datapaths
    • Arbitration and control logic
    • Clocking and reset architectures
  • Solid understanding of ASIC development flows, including:
    • Logic synthesis
    • Static Timing Analysis (STA)
    • Clock Domain Crossing (CDC)
    • Timing closure
  • Experience developing and integrating third-party and custom IP into large-scale ASICs or SoCs.
  • Strong debugging and problem-solving skills throughout the design lifecycle.
  • Proficiency with scripting and automation tools such as Python, Tcl, Perl, or Make.


Preferred Qualifications
  • Experience with mixed-signal ASIC development and collaboration with analog design teams.
  • Knowledge of Design-for-Test (DFT), scan insertion, and MBIST methodologies.
  • Experience supporting silicon bring-up, validation, and characterization activities.
  • Familiarity with UVM-based verification environments and simulation/debug tools.
  • Experience working on advanced process nodes and high-performance semiconductor products.


What Will Make You Successful
  • Ability to drive technical solutions in a collaborative, cross-functional environment.
  • Strong communication skills and attention to detail.
  • Passion for developing innovative semiconductor technology.
  • Desire to continuously improve design methodologies, automation, and engineering efficiency.
  • A proactive approach to problem solving and ownership of deliverables from specification through production release.

Compensation: The base salary range for this role is $154,900 - $247,800. This range is a good faith estimate, and the amount of base salary will correspond with experience and skill set. This range can also fluctuate depending on demand and location.

Incentive Plan: This job is eligible for discretionary bonus(es) based on financial performance.

Benefits: Teradyne offers a variety of comprehensive health and well-being benefit programs, including medical, dental, vision, Flexible Spending Accounts, retirement savings plans, life and disability insurance, paid vacation & holidays, tuition assistance programs, and more. Please click here to see details.

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About Teradyne

Teradyne, Inc. is a leading supplier of automation equipment for test and industrial applications. Teradyne Automatic Test Equipment (ATE) is used to test semiconductors, wireless products, data storage and complex electronic systems, which serve consumer, communications, industrial and government customers. Industrial Automation products include Collaborative Robots used by global manufacturing and light industrial customers to improve quality and increase manufacturing efficiency. In 2019, Teradyne had revenue of $2.3 billion and today employs 5,500 people worldwide. For more information, visit teradyne.com. Teradyne(R) is a registered trademark of Teradyne, Inc. in the U.S. and other countries.
Learn more about Teradyne
Size
5,900 employees
Market Cap
$13.1 billion
Industry
Net Income
$784.1 million
Founded
1960
5 Year Trend
+16.1%
Revenue
$3.1 billion
NASDAQ

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