Bachelor's degree in Systems Engineering, or a related Science, Engineering or Mathematics field, plus a minimum of 8 years of relevant experience; or Master's degree, plus a minimum of 6 years of relevant experience.

CLEARANCE REQUIREMENTS:

Department of Defense TS/SCI security clearance is preferred at time of hire. Candidates must be able to obtain a TS/SCI clearance within a reasonable amount of time from date of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required.

Job Description

As a Sr Advanced TIDES Engineer, you will serve as a senior cross-functional technical lead supporting the Test Integration & Development Environment for Spacecraft organization. This role spans the three TIDES pillars: System Test Environment hardware, Platform Integration & Evolution firmware, and Standard Software Infrastructure.

You will help define, integrate, and mature test environments used to support spacecraft payload development, design verification, production test, and sustainment. You will work directly with TIDES leadership, program engineering teams, Integration & Test, Manufacturing Operations, FPGA engineers, software engineers, hardware design teams, and proposal teams to ensure test environments are technically sound, reusable, supportable, and aligned with program verification needs.

The ideal candidate can move comfortably between rack-level test hardware, FPGA and digital interfaces, requirements traceability, automated test infrastructure, networked software deployment, proposal development, cost and risk analysis, and program execution priorities.

Responsibilities for this Position

ROLE AND POSITION OBJECTIVES:

As a Sr Advanced Engineer for TIDES, you will support the development, deployment, and proposal shaping of integrated spacecraft test environments across hardware, firmware, and software infrastructure.

Key responsibilities include:

• Lead technical coordination across STE, PIE, and SSI scope.
• Support architecture, design, integration, and verification of development, unit verification, production, module, power converter, NAS and calibration test environments.
• Translate payload and program requirements into test capabilities, measurement approaches, interface needs, verification methods, and evidence-generation plans.
• Support design package development, including top-level assemblies, interface control documents, cable packages, rack architecture, RF drawer concepts, FPGA/IO drawer concepts, calibration planning, BOM coordination, and test readiness artifacts.
• Coordinate FPGA and digital I/O needs across test racks, payload interfaces, data capture paths, timing/reference distribution, and platform evolution plans.
• Support DOTI (internal software tool) and related test infrastructure deployment, including station configuration, network topology, equipment monitoring, automated test execution, data handling, and reusable software core integration.
• Identify gaps between payload requirements, available test capability, ATP coverage, calibration approach, and formal verification evidence.
• Drive reuse across programs by identifying common capabilities that should be promoted into TIDES core infrastructure.
• Support proposal development, BOE inputs, labor estimates, technical approaches, assumptions, risks, opportunities, and execution plans.
• Lead or support technical solutioning discussions with program teams, capture teams, engineering leadership, and subject-matter experts.
• Drive trade studies across hardware, FPGA, software infrastructure, automation, calibration, verification, schedule, cost, and risk.
• Translate ambiguous program needs into candidate architectures, phased implementation plans, staffing needs, risks, and decision points.
• Support technical reviews, proposal color-team responses, customer-facing discussion preparation, and internal leadership briefings.
• Mentor engineers across disciplines and help establish consistent engineering practices across TIDES products.
• Communicate technical issues, risks, impacts, and corrective actions to program teams, leadership, and internal customers.

Basic Qualifications

Requires a Bachelor’s degree in Systems Engineering, Electrical Engineering, Computer Engineering, Software Engineering, or a related Science, Engineering, or Mathematics field, plus a minimum of 8 years of relevant experience; or a Master's degree plus a minimum of 6 years of relevant experience.

Preferred Skills / What Sets You Apart

• Experience with spacecraft payload development, integration, verification, production test, or sustainment.
• Strong understanding of system test environments, automated test systems, RF test equipment, FPGA-based interfaces, rack-level integration, test data infrastructure, and networked lab environments.
• Ability to work backward from payload requirements to define required stimulus, measurement, cabling, calibration, software, network configuration, and ATP evidence.
• Experience with requirements analysis, requirements traceability, interface definition, system integration, verification planning, and test readiness reviews.
• Experience supporting proposals, BOEs, technical volumes, basis-of-estimate narratives, labor estimates, risks, assumptions, and solution-space trades.
• Ability to lead technical discussions where the problem is not fully defined and drive the team toward practical, executable options.
• Experience configuring and sustaining internal test networks and lab infrastructure, including static IP planning, isolated instrument LANs, 10G data paths, server/workstation setup, software deployment, account coordination, backup/data handling, and troubleshooting of networked test equipment.
• Familiarity with LabVIEW, TestStand, Python, Git, CI/CD concepts, Kubernetes or containerized deployment (docker), networked test systems, and instrument control.
• Familiarity with FPGA development, high-speed digital interfaces, timing/reference distribution, JESD204B, Ethernet/10G data paths, or hardware-in-the-loop test.
• Strong technical judgment across electrical hardware, software infrastructure, systems engineering, lab infrastructure, and software deployment boundaries.
• Demonstrated ability to lead technical coordination across multiple teams, resolve ambiguity, remove blockers, and drive closure on complex integration issues.
• Strong problem-solving mindset with the initiative to fix issues as they arise, prevent recurring problems, and identify technical risks before they impact program execution.
• Ability to leverage AI-enabled tools appropriately for engineering productivity, research, documentation, automation, analysis, and decision support while applying independent technical judgment and verification.
• Strong written and verbal communication skills, including the ability to brief technical risks, trade studies, readiness gaps, and corrective actions.
• Motivated to improve reuse, standardization, automation, resiliency, and long-term supportability across program test environments.

 Our Commitment to You:

• An exciting career path with opportunities for continuous learning and development.
• Research oriented work, alongside award winning teams developing practical solutions for our nation’s security
• Flexible schedules with every other Friday off work, if desired (9/80 schedule)
• Competitive benefits, including 401k matching, flex time off, paid parental leave, healthcare benefits, health & wellness programs, employee resource and social groups, and more
• See more at gdmissionsystems.com/careers/why-work-for-us/benefits

Workplace Options:This position is fully on-site, OR Hybrid/Flex as desired.While on-site, you will be a part of the Scottsdale, AZ location