Job Title: Specialist, FPGA Verification, UVMJob Code: 44200Job Location: Palm Bay, FLJob Schedule: 9/80: Employees work 9 out of every 14 days - totaling 80 hours worked - and have every other Friday off Job Description: Seeking talented UVM/Design Verification Engineer, able to work in teams and independently, learn quickly and be productive in a fast paced, dynamic environment.
Essential Functions: - Execute and contribute to the FPGA verification plan
- Architect UVM test cases for individual blocks or sub blocks within an FPGA
- Develop reusable agents, top level testbench modules and environments
- Define and implement functional coverage model based upon DUT requirements and close code coverage.
- Utilize UVM to create drivers, monitors, predictors, and scoreboards based on DUT requirements.
- Strong understanding of FPGA design process including requirements generation, preliminary design, peer reviews, detailed design, test plan generation, and integration and test.
- Work independently or with limited guidance to develop test bench solutions.
- Familiarity with test scoping for complex designs, code coverage, functional coverage, assertions.
- Ability to focus on finding design issues, corner cases and out of box ideas to make designs more robust.
- Ability to obtain US government clearance.
Qualifications: - Bachelor's Degree and minimum 4 years of prior relevant experience. Graduate Degree and a minimum of 2 years of prior related experience. In lieu of a degree, minimum of 8 years of prior related experience.
Preferred Additional Skills:- Experience with and understanding of Altera or Xilinx / AMD FPGA architectures
- Experience with high speed serial protocols (PCI Express, SRIO, Ethernet)
- Experience designing 10G Ethernet based Network Interface Designs
- Experience in network protocols including IPv6 and UDP
- Experience with SoC (Kintex UltraScale/UltraScale+, Virtex UltraScale/UltraScale+, Zynq UltraScale)
- Experience with VHDL
- Experience in ASIC / FPGA verification using C/C++ and/or System Verilog
- Experience with DO-254 air worthiness certification
- Experience with building and setting up scalable simulation/verification environments.
- Experience with and understanding of Altera and/or Xilinx FPGA architectures.
- Experience with Vivado and/or Quartus tool suite.
- Proficiency with hardware verification languages: System Verilog, System Verilog Assertions
- Proficiency with Object Oriented Programming Concepts: Inheritance, Polymorphism, etc.
- Proficient in scripting languages: bash/csh, Perl, Python, etc.
- Revision Control Systems: svn, git
- Proficient in Linux Environments
- Constrained Random Verification Experience highly desired.
- Experience with packet-based protocols (PCI Express etc.), Network-centric designs (Ethernet, IP, FC).
- Experience with high speed memory interfaces (DDRx)
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