The selected candidate will be performing digital validation of SoCs. The validation will require understanding SoC architecture and design specifications of specific IPs, developing validation test plans working with partner teams such as design/verification/SW, developing validation drivers and test content, executing validation content on emulation and silicon, and debugging failures. The validation drivers and test content may be bare metal and/or OS based (Linux, RTOS).

Required Skillset:

• Able to read and understand SoC architecture and design specifications for various IPs.

• Experienced in C programming language and build environment such as makefiles, compiler flags, and linker scripts.

• Ability to develop scripts (such as Python) to post-process executable images into platform loadable images (emulation and validation boards).

• Exposure to assembly level programing (Preferably ARM32/ARM64)

• Ability to debug SoC using features such as Trace32, TARMAC instruction traces, and waveform traces; Debug skills include development of CMM scripts and ability to recreate test (code) given detailed explanation of a specific failure.

• Exposure to Linux kernel builds and Linux ramdisk creation; booting and debugging Linux on emulation and validation platforms.

Desired Knowledge:

• Understanding of multi-core environment in an SoC and bus infrastructure.

• Understanding of interrupt controllers, DMA, GPIO. peripheral understanding useful (UART, I2C, PCIe, etc.)

• Understanding of SoC low power modes.