General Summary:The candidate will work in a team-oriented, professional engineering environment to perform a variety of signal and power integrity tasks and collaborate with package and IC designers to optimize the overall package design. Electrical model extraction and signal and power integrity simulations will constitute the majority of the tasks. This engineer must interface with a variety of board, package, and IC designers. Working effectively across organizational boundaries is essential, as is effective documentation and presentation of results. This candidate will work on high-speed memory interfaces for electrical model extraction and system-level simulation.
Responsibilities:- Perform various IO analyses using established methodologies, potentially from model extraction through simulation and reporting of conclusions. IO types include a variety of memory interfaces.
- Apply established methodologies to analyze IO power distribution in product development and reference systems.
- Perform package extraction for time domain and frequency domain analysis and provide design guidelines for the package design.
- Create clear and complete documentation of results.
Minimum Qualifications:• Bachelor's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 4+ years of System/Package Design/Technology Engineering or related work experience.
OR
Master's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 3+ years of System/Package Design/Technology Engineering or related work experience.
OR
PhD in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 2+ year of System/Package Design/Technology Engineering or related work experience.
Preferred Qualifications:- 3+ years of experience in DDR in Package/PCB/System Design related to compute/server standards.
- Experience in electromagnetics and a solid background in transmission line theory and crosstalk.
- Proficiency in field solvers such as HFSS, Q3D, Sentinel-PSI, and Clarity, and SPICE transient simulation (ADS, Hspice), including use of IBIS and IBIS AMI models.
- Experience in DDR design specifications such as DDR and LPDDR
- Experience in Matlab to automate existing simulation flow.
- Experience in programming languages (C/C++) or scripting languages (Perl/Python) is a plus.
- Master's or Ph.D. degree with 3+ years of industry experience.
Pay range and Other Compensation & Benefits: $154,000.00 - $231,000.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer - and you can review more details about our US benefits at this link.
If you would like more information about this role, please contact Qualcomm Careers.