Job Details:Job Description:Intel's Data Center & AI Group (DCG) is driving the next generation of data center computing through workload-driven product innovation and customer-validated performance leadership. As a
Senior Product Manager -Server CPU for
Intel® Xeon® platforms, you will own a product end-to-end-from definition and roadmap planning through production readiness, launch, and lifecycle management.
This role acts as the
single-threaded owner for a Xeon product, accountable for translating ambiguous inputs into clear decisions, defining workload-based success metrics, and aligning engineering, validation, manufacturing, and go-to-market teams around measurable outcomes. Success requires strong execution, technical depth, and influence in a highly matrixed environment.
Responsibilities will include but are not limited to: Product Ownership & Lifecycle Leadership- Own a Xeon product through its full lifecycle: product definition, planning, development, production, launch, and end-of-life.
- Serve as the central point of coordination across design, architecture, process technology, manufacturing, test, quality, and marketing.
- Maintain lifecycle accountability, including upgrades, feature changes, and product sustaining decisions.
Product Strategy & Roadmap Influence- Apply competitive intelligence, customer insights, and workload analysis to influence product priorities within the broader Xeon portfolio framework.
- Partner with platform and system architects to assess emerging technologies and provide informed recommendations for future product investments.
- Translate customer and ecosystem feedback into actionable inputs for roadmap and feature decisions.
Competitive Positioning & Product Messaging- Analyze the competitive landscape and define product positioning that clearly communicates customer value.
- Develop performance leadership narratives grounded in real workload KPIs, not just specifications.
- Support go-to-market planning and engage with customers and ecosystem partners to validate workloads, use cases, and performance targets.
Technology Readiness & Launch Execution- Own workload and KPI readiness gates, driving execution across validation, debug, and performance optimization teams.
- Represent product readiness, risks, and mitigation plans in executive and cross-organizational reviews.
- Support global product launches in partnership with marketing, communications, PR, and sales enablement teams.
Cross-Functional Leadership- Align engineering, marketing, manufacturing, and business stakeholders on priorities, tradeoffs, and definitions of success.
- Drive convergence across validation, debug, and performance teams to ensure outcomes reflect real customer requirements.
- Operate effectively in a highly matrixed environment, influencing without direct authority.
Qualifications:You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:- Bachelor's in Electrical /Computer Engineering, Computer Science, or STEM related field with 7+ year of experience.
- 7+ years of experience in semiconductor product management, technical marketing, or product architecture.
- 7+ years of experience owning end-to-end hardware or platform products, including launch and lifecycle.
Preferred Qualifications:- Demonstrated depth operating at the system or platform level.
- Proven track record owning product decisions under ambiguity - including setting success criteria, driving tradeoffs, and carrying consequences.
- Demonstrated ability to lead senior engineering stakeholders without direct authority.
- Ability to articulate a coherent product narrative that connects architecture intent, workload performance, competitive positioning, and customer value.
- MBA or equivalent experience translating technical tradeoffs into business, portfolio, and market implications.
- Direct experience with server or datacenter platform business involving CPU, memory, and I/O.
- Demonstrated exposure to hyperscale, CSP, or OEM/ODM customers or ecosystems.
- Hands-on involvement with workload-based performance or benchmarking frameworks (e.g., MLPerf, SPEC, TPC, or equivalent internal systems).
Job Type:Experienced Hire
Shift:Shift 1 (United States of America)
Primary Location:US, Oregon, Hillsboro
Additional Locations:US, California, Folsom, US, Texas, Austin
BenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $188,330.00-265,870.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
