Marvell Technology

Senior Principal Memory Architect

Marvell Technology$191K — $286K *
Technical Services
8 - 10 years of experience
Job Overview by Ladders

Qualifications

  • Bachelor's in Electrical/Computer Engineering or related field with 15+ years experience, or a Master's/PhD with 8+ years relevant experience.
  • Deep understanding of DDR/HBM memory subsystem architecture for data center compute, AI, or XPU systems.
  • Experience in designing or specifying HBM/DDR memory controllers and subsystems.
  • Familiarity with JEDEC standards (HBM3/4, DDR4/5, etc.) and memory interface technologies.
  • Proven background in developing ECC, RAS, and reliability features for high-performance SoC designs.
  • Strong analytical skills and a history of innovation in memory architecture.

Responsibilities

  • Architect high-performance HBM/DDR memory subsystems for custom compute products.
  • Define Marvell's memory controller architecture strategy and roadmap.
  • Drive micro-architecture development and testing plans in collaboration with design teams.
  • Develop system-level models to optimize performance across design options.
  • Collaborate with hardware, firmware, and validation teams for product quality.
  • Lead initiatives for memory subsystem architecture improvements.
  • Represent Marvell in technical discussions with customers and ecosystem partners.

Benefits

  • Flexible time off and paid time off to volunteer.
  • 401(k) retirement plan.
  • Year-end shutdown and floating holidays for additional time off.
  • Comprehensive health and financial wellbeing support.
Full Job Description
Your Team, Your Impact

The Custom Cloud Solutions (CCS) Architecture team is at the forefront of designing and delivering Marvell's next-generation custom silicon for the world's most advanced cloud and AI data centers. This group defines the product and technology vision for custom compute ASICs, collaborating closely with top hyperscalers, system architects, and Marvell's internal design, IP, and technology teams.

As a Senior Principal Memory Architect, you will play a key role in defining and delivering memory subsystem solutions that power cutting-edge data center architectures. Your work will directly shape Marvell's leadership in memory innovation across AI, HPC, and cloud workloads.

What You Can Expect
  • Architect high-performance HBM/DDR memory subsystems for Marvell's custom compute products, including developing specifications, performance models, and product requirements.
  • Define and evolve Marvell's memory controller architecture strategy and roadmap, partnering with customers and internal teams to deliver optimal solutions for next-generation workloads.
  • Drive micro-architecture development, design specifications, and verification plans in close collaboration with RTL, physical design, and validation teams.
  • Develop system-level models to evaluate and optimize performance (throughput, latency, QoS, power, area) across multiple design options.
  • Collaborate cross-functionally with hardware, firmware, and validation organizations to ensure end-to-end product quality, performance, and reliability.
  • Lead innovation initiatives around memory subsystem architecture, including ECC, RAS, and reliability improvements for server-class products.
  • Represent Marvell in technical discussions with customers and ecosystem partners, influencing industry direction and technical decisions.


On-site requirement: This role is 100% in-office at our Santa Clara, Irvine or Boise locations five days per week (no remote or hybrid work option).

What We're Looking For
  • Education:
    • Bachelor's degree in Electrical Engineering, Computer Engineering, or related field and 15+ years of relevant experience, or
    • Master's/PhD with 8+ years of experience in memory architecture or system design.
  • Technical Expertise:
    • Deep understanding of DDR/HBM memory subsystem architecture for data center compute, AI, or XPU systems.
    • Proven experience designing or specifying HBM/DDR memory controllers and associated subsystems.
    • Strong familiarity with JEDEC standards (HBM3/4, DDR4/5, LPDDR5/5X/6) and related memory interface technologies.
    • Experience with system modeling and performance analysis tools for evaluating memory system trade-offs.
    • Demonstrated experience developing ECC, RAS, and reliability features for server or high-performance SoC designs.
  • Soft Skills:
    • Strong analytical and conceptual thinking with a track record of innovation.
    • Excellent communication skills and the ability to collaborate effectively across global, multi-disciplinary teams.
    • Passion for architecting memory solutions that redefine performance and efficiency in data center computing


Expected Base Pay Range (USD)
191,530 - 286,900, $ per annum

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements
Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life's most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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About Marvell Technology

Marvell Technology is a semiconductor company that designs and develops analog, mixed-signal, and digital signal processing integrated circuits. The company's product portfolio includes processors, connectivity, storage, and security solutions. Marvell's customers operate in various industries, including data center, enterprise, automotive, industrial, and consumer electronics. The company was founded in 1995 and is headquartered in Santa Clara, California.
Learn more about Marvell Technology
Size
6,729 employees
Market Cap
$30.6 billion
Industry
Net Income
-$277.3 million
Founded
2013
5 Year Trend
+14.2%
Revenue
$2.9 billion
NASDAQ

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