Job Summary

The Senior Device Engineer in RFIC Design independently works in the development and optimization of semiconductor devices for high-frequency integrated circuits. This position focuses on delivering high performance and manufacturable RF devices for pSemi's high-performance UltraCMOS™ process technology, partnering with process and circuit design teams to ensure devices meet stringent RF requirements. The engineer supports device development, reliability testing, and process refinement to enable robust, high-performance RFIC solutions across wireless, radar, and communication applications.

Roles & Responsibilities

This position has responsibility for:

• Independently define and execute RFSOI Device development and technology optimization projects in collaboration with cross-functional teams.
• Develop a deep understanding of the relationship between RF performance, DC performance, device architecture, layout, process integration, and manufacturing variability.
• Utilize TCAD process and device simulations (2D/3D) to understand device behavior, evaluate technology options, and guide development decisions.
• Correlate TCAD simulation results with silicon measurements and characterization data.
• Work closely with Characterization team and create measurement plan for semiconductor devices such as DC, CV, RF, small-signal, large-signal, load-pull, and reliability methodologies.
• Analyze complex characterization data to identify performance trends, isolate anomalous behavior, explain non-ideal or non-classical effects, and recommend next steps for device, process, or model development.
• Apply statistical methodologies to evaluate device distributions, process capability, variability sources, and reliability trends.
• Support compact model development, device parameter extraction, and technology qualification activities.
• Author and present clear technical reports, present findings and data-based recommendations for technical and cross-functional audiences.
• Maintain controlled device and characterization documentation, technical data repositories, and internal knowledge resources.

Minimum Qualifications (Experience and Skills)

• Advanced working knowledge of semiconductor device physics, particularly SOI and RFSOI technologies.
• Hands-on experience with semiconductor process development and wafer fabrication.
• Experience working with CMOS and SOI process technologies.
• Basic understanding of RF device characterization and analysis.
• Experience with TCAD process and device simulation tools such as Synopsys or Silvaco.
• Proficiency in Python, MATLAB, or a similar scientific-computing environment for device and statistical analysis and data visualization.
• Demonstrated ability to analyze complex, multidimensional technical data using engineering and statistical-analysis tools and translate results into clear technical conclusions.
• Basic understanding of high frequency measurements (S-parameters, Load Pull, Harmonics, and Noise Figure).
• Experience extracting device figures of merit such as gm, gds, Cgs, Cgd, Ron, Coff, ft, fmax.
• Understanding of device reliability mechanisms including HCI, BTI, TDDB, and ESD.
• Basic understanding of how devices are used in RFIC design.
• Understanding of the interaction between semiconductor manufacturing and device performance
• Demonstrated ability to independently diagnose complex technical problems, evaluate alternative approaches, implement solutions, and verify results.
• Ability to work effectively across device, process, modeling, characterization, and circuit-design teams and communicate technical recommendations to diverse engineering audiences.
• Strong written and verbal technical communication skills, including the ability to document methods, present findings, and explain data-based recommendations.
• Demonstrated ability to plan and execute complex technical assignments independently under general direction.

Preferred Qualifications

• Knowledge of process integration, technology transfer, and yield ramp activities.
• Familiarity with Cadence design or similar layout environments.
• Familiarity with circuit simulation tools such as Cadence Virtuoso or ADS.
• Programming experience in Python, MATLAB, JMP or similar environments for data analysis and automation.
• Understanding of small and large signal characterization and data analysis.
• Wafer-Level Characterization

Education Requirements

• PhD in EE or related field.
• MS in EE or related field +3 years of experience in a similar role.
• BS in EE or related field and at least +5 years of experience in a similar role.

Work Environment

This job operates in a professional office environment. This role routinely uses standard office equipment.

Physical Demands

The physical demands described here are representative of those that must be met by an employee to successfully perform the essential functions of this job. While performing the duties of this job, the employee is regularly required to talk or hear. The employee frequently is required to stand; walk; use hands to finger, handle or feel; and reach with hands and arms. Specific vision abilities required by this job include close vision, distance vision, color vision, peripheral vision, depth perception and ability to adjust focus. This position requires the ability to occasionally lift office products and supplies, up to 20 pounds.

USD 129,960.84 - 168,958.44 per year

Note: The Peregrine Semiconductor name, Peregrine Semiconductor logo and UltraCMOS are registered trademarks and the pSemi name, pSemi logo, HaRP and DuNE are trademarks of pSemi Corporation in the U.S. and other countries. All other trademarks are the property of their respective companies. pSemi products are protected under one or more of the following U.S. Patents: http://patents.psemi.com

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