Ciena

Senior Digital ASIC Design Engineer

Ciena$109K — $174K *
Telecommunications & Hardware
5 - 7 years of experience
Job Overview by Ladders

Qualifications

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science
  • 5+ years of experience in ASIC design
  • Proficient in Verilog, SystemVerilog, and Python
  • Experience in areas such as synthesis, static timing analysis, and asynchronous clock domain crossing
  • Strong problem-solving skills and ability to work independently in a team environment
  • Effective written and verbal communication skills in technical contexts

Responsibilities

  • Contribute to ASIC design and integration for WaveLogic products
  • Collaborate with systems engineers and architects to interpret specifications
  • Develop top-level RTL designs that integrate multiple IP blocks
  • Maintain technology-specific libraries for advanced semiconductor nodes
  • Manage tool flows for ASIC top-level integration
  • Create timing constraints and analyze related reports
  • Conduct lab validation of ASIC prototypes and production silicon

Benefits

  • Comprehensive medical, dental, and vision plans
  • Participation in 401(K) (USA) & DCPP (Canada) with company matching
  • Employee Stock Purchase Program (ESPP)
  • Employee Assistance Program (EAP)
  • Paid company holidays, sick leave, and vacation time
  • Access to Paid Family Leave and other leaves of absence
Full Job Description
Ciena's WaveLogic products are central to advancing high-performance optical networking solutions. This role contributes to the design and integration of next-generation ASIC technologies that power critical telecommunications infrastructure. The position enables delivery of scalable and high-quality silicon solutions through cross-functional collaboration.

How you will make an impact:
  • Contribute to top-level ASIC design and integration for WaveLogic products
  • Interpret architecture and functional specifications and collaborate with systems engineers and architects
  • Develop and assemble top-level RTL designs integrating multiple IP blocks
  • Maintain and enhance technology-specific libraries for advanced semiconductor nodes
  • Own and manage tool flows supporting ASIC top-level integration
  • Create timing constraints and analyze synthesis, timing, layout, and backend reports
  • Perform lab validation of ASIC prototypes and production silicon


The must haves:
  • Education: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science
  • Experience: 5+ years of experience in ASIC design.
  • Ability to work independently while contributing within a team environment
  • Application of structured approaches to solving complex technical problems
  • Written and verbal communication in English within technical environments
  • Utilization of Verilog, SystemVerilog, and Python in digital design workflows
  • Application of digital design concepts including synthesis, static timing analysis (STA), timing closure, and asynchronous clock domain crossing


Nice to haves:
  • Exposure to programming languages including C, C++, and SystemC
  • Use of scripting or object-oriented programming approaches in engineering workflows
  • Experience with ASIC verification.


Pay Range:

The annual pay range for this position is C$109,000 - C$174,000.

#LI-BS1

Pay ranges at Ciena are designed to accommodate variations in knowledge, skills, experience, market conditions, and locations, reflecting our diverse products, industries, and lines of business. Please note that the pay range information provided in this posting pertains specifically to the primary location, which is the top location listed in case multiple locations are available.

Non-Sales employees may be eligible for a discretionary incentive bonus, while Sales employees may be eligible for a sales commission. In addition to competitive compensation, Ciena offers a comprehensive benefits package, including medical, dental, and vision plans, participation in 401(K) (USA) & DCPP (Canada) with company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company-paid holidays, paid sick leave, and vacation time. We also comply with all applicable laws regarding Paid Family Leave and other leaves of absence.

About Ciena

Ciena Corporation is a global supplier of telecommunications networking equipment, software, and services. The company was founded in 1992 and is headquartered in Hanover, Maryland. Ciena's products include optical transport and switching systems, software, and services that support the transport, switching, aggregation, and management of voice, video, and data traffic. Ciena serves customers in the telecommunications industry, including telecommunications service providers, cable operators, governments, and enterprises. The company has approximately 7,000 employees worldwide and operates in more than 100 countries.
Learn more about Ciena
Size
7,241 employees
Market Cap
$7.3 billion
Industry
Net Income
$354.3 million
Founded
1992
5 Year Trend
+5.3%
Revenue
$3.4 billion
NASDAQ

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