Senior Design Verification Engineer - Memory Controller Subsystem (HBM)

ACL Digital

• $120K — $160K *
San Jose, CA 95123In-Person
Consumer Technology
5 - 7 years of experience
Today
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Job Overview by Ladders

Qualifications

  • 5-12 years of relevant experience in verification or related field.
  • Strong expertise in SystemVerilog/UVM for verification processes.
  • Proven track record in verifying DDR/HBM memory controllers or subsystems.
  • Solid grasp of HBM/DDR protocols and AXI interfaces.
  • Familiarity with assertions, coverage closure, and VIP integration workflows.
  • Proficient in using simulation tools like Xcelium, VCS, or Questa, and scripting in Python, Perl, or Shell.

Responsibilities

  • Verify HBM-based Memory Controller subsystem using SystemVerilog/UVM.
  • Develop verification plans, UVM testbenches, test cases, and functional coverage.
  • Assess HBM protocol efficiency including memory transactions and power management.
  • Execute regressions and debug RTL/design issues to ensure coverage closure.
  • Collaborate with Architecture, RTL, and Validation teams for verification signoff.
Full Job Description
Experience: 5-12+ Years

Responsibilities
  • Verify the HBM-based Memory Controller subsystem using SystemVerilog/UVM.
  • Develop verification plans, UVM testbenches, test cases, assertions (SVA), and functional coverage.
  • Verify the HBM protocol, memory transactions, scheduling, ECC, QoS, power management, and performance.
  • Execute regressions, debug RTL/design issues, and drive functional and code coverage closure.
  • Collaborate with Architecture, RTL, and Validation teams through verification signoff.
Required Skills
  • Strong SystemVerilog/UVM expertise.
  • Experience verifying DDR/HBM memory controllers or memory subsystems.
  • Good understanding of HBM/DDR protocols, AXI interfaces, and memory architecture.
  • Experience with assertions, constrained-random verification, coverage closure, and VIP integration.
  • Proficiency with Xcelium/VCS/Questa and scripting (Python/Perl/Shell).
* Ladders Estimates

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