Senior ASIC (Front End) Design Engineer

Ethernovia, Inc.

$120K — $150K *
Enterprise Technology
8 - 10 years of experience
Job Overview by Ladders

Qualifications

  • BS and/or MS in Electrical Engineering, Computer Science, or related field
  • 10+ years of ASIC RTL design and/or architecture experience
  • Development of complex SoCs
  • Strong understanding of digital design fundamentals and methodologies
  • In-depth knowledge of Verilog/System Verilog and simulation tools
  • Self-motivated, effective both independently and in teams

Responsibilities

  • Lead all aspects of digital SoC design
  • Collaborate with system architects and verification engineers
  • Define product specifications for ASIC internal and external interactions
  • Implement and deliver high-performance custom silicon
  • Manage resource allocation and software interfaces

Benefits

  • Technology depth and breadth expansion beyond large company experience
  • Career growth opportunities
  • Pre IPO stock options
  • Engagement with cutting-edge technology
  • Opportunity to work with a world-class team
  • Flexible hours
  • Comprehensive medical, dental, and vision insurance
Full Job Description
Senior ASIC (Front End) Design Engineer

Summary:
  • As a Senior ASIC (Front End) Design Engineer, you will be responsible for all aspects of digital SoC design, from micro-architecture specification, RTL, verification, synthesis, lint, CDC, LEC, and static timing analysis to deliver a design meeting target power, performance, and area goals.
  • Work with system architects, software, hardware, and verification engineers to plan, architect, design, implement, and deliver advanced automotive communication semiconductors and systems.
  • You will be on the leading edge of the development and definition of advanced, high-performance custom silicon that embodies functions from a wide range of protocols, algorithms, and applications.
  • Expected to flesh out product definitions with precise specifications of: an ASIC's internal and external interactions, data flow, processing algorithms across a number of disciplines, resource management, and software interfaces.
  • You will be a trusted self-starter who can work with very little guidance or oversight.
  • This position is located in: Toronto, Canada - Hybrid

Key Qualifications:
  • BS and/or MS in Electrical Engineering, Computer Science, or related field
  • Minimum 10+ years of ASIC RTL design and/or architecture experience
  • Proven track record with the development of complex SoCs
  • Strong understanding of digital design fundamentals and methodologies
  • In-depth knowledge of Verilog/System Verilog and simulation tools.
  • Self-motivated and able to work effectively both independently and in a team

Additional Success Factors:

Experience in any of the following areas:
  • Networking (Ethernet MAC, PHY/PCS, Switching, TCP/IP, PCIe and other industry standard protocols)
  • Digital signal processing filters
  • Digital Mixed-Signal modeling, design, and integration
  • IP integration (SerDes, controllers, processors, etc.)
  • Video standards, protocols, processing
  • Perl, TCL, C/C++, Make

Personal Skills:
  • Excellent communication/documentation skills.
  • Attention to details.
  • Collaboration across multidisciplinary and international teams.

What You Can Expect from Ethernovia:
  • Technology depth and breadth expansion that can't be found in a large company
  • Opportunity to grow your career as the company grows
  • Pre IPO stock options
  • Cutting edge technology
  • World class team
  • Competitive base salary
  • Flexible hours
  • Medical, dental and vision insurance for employees

#LI-Hybrid

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