Ciena

Senior Analog & Mixed-Signal Modelling Architect

Ciena$109K — $174K *
Telecommunications & Hardware
Less than 5 years of experience
Job Overview by Ladders

Qualifications

  • Post-graduate degree in Physics or Engineering with focus on ASIC hardware, communication systems, or control systems.
  • Expert understanding of analog and mixed-signal processing in high-speed communication systems.
  • Proven experience in writing C++ and/or SystemC behavioral models.
  • Demonstrated ability to work at the system architecture level while considering real analog behavior.
  • Solid grasp of key analog impairments and their effects on modem performance.
  • Ability to mentor engineers and provide technical guidance across disciplines.
  • Comfortable working in a Linux-based environment using Git.

Responsibilities

  • Define and review system-level analog and mixed-signal functions for high-speed optical modems.
  • Develop behavioral models of analog blocks using C++ and SystemC with an emphasis on execution speed and observability.
  • Model continuous-time and mixed-signal behaviors of critical subsystems like PLLs, filters, and ADCs.
  • Build and maintain C++ and MATLAB-based verification flows to integrate behavioral models with system simulators and enhance testing efficacy.
  • Collaborate with cross-functional teams to ensure model alignment and validation methodologies.
  • Support ASIC lab bring-up by correlating silicon outcomes with behavioral models and simulation data.
  • Plan design tasks while specifying necessary resources, tools, and processes.

Benefits

  • Comprehensive health benefits including medical, dental, and vision plans.
  • 401(K) (USA) & DCPP (Canada) with company matching.
  • Employee Stock Purchase Program (ESPP) available.
  • Employee Assistance Program (EAP) access.
  • Paid holidays, sick leave, and vacation time.
  • Commitment to a respectful workplace that values diversity and individual contributions.
Full Job Description

This is a senior level position.

We are seeking a Senior Analog & Mixed-Signal Modelling Architect to join our DSP team. In this role, you will drive the design, modeling, and system-level validation of analog and mixed-signal subsystems for next-generation high-speed coherent optical modems.

This position emphasizes behavioral modeling using C++ and SystemC, tightly integrated with MATLAB-based system simulations, firmware bring-up flows, and lab validation. You will operate at the intersection of analog-/digital-hardware, DSP, firmware, and electro-optical subsystems - contributing architectural decisions from early concept through silicon bring-up and product deployment.

Primary Duties and Responsibilities

  • Define and review systemlevel analog and mixedsignal functions for coherent optical modems.
  • Develop behavioral models of analog and mixedsignal blocks using C++ and SystemC, with emphasis on firmware registermap interfaces, control, observability, and execution speed rather than circuitlevel detail.
  • Apply C++ / SystemCAMS to model continuoustime and mixedsignal behavior of PLLs, clocking systems, filters, DACs, ADCs, SerDes, and related subsystems.
  • Build, support, and maintain C++ and MATLABbased verification flows, including C++ MEX wrappers that enable behavioral models to be exercised directly within system simulators.
  • Collaborate closely with analog, digital, DSP, firmware, and lab teams to align models, specifications, and validation plans.
  • Support ASIC lab bringup and characterization, correlating silicon and lab data with behavioral models and system simulations.
  • Plan and schedule design tasks; specify required resources, tools, and processes.
  • Create and publish design guidelines, howto documents, and setup guides in Confluence.
  • Mentor junior engineers and contribute to best practices in analog behavioral modeling and systemlevel validation.

Candidate Profile

  • Expertlevel understanding of analog and mixedsignal processing in highspeed communication systems.
  • Proven experience writing C++ and/or SystemC behavioral models for hardwareadjacent systems.
  • Demonstrated ability to operate at the systemarchitecture level while remaining grounded in real analog behavior and physical impairments.
  • Solid understanding of key analog impairments, including noise, distortion, nonlinearity, bandwidth limitations, jitter, and phase noise, and their impact on modemlevel performance.
  • Strong intuition for analogdigital partitioning, powerperformance tradeoffs, and calibration strategies.
  • Comfortable translating loosely defined system goals into wellbounded analog architectures and specifications.
  • Ability to mentor engineers across disciplines and serve as a technical reference for analog signalprocessing decisions.
  • Comfortable working in a Linuxbased development environment, using Git and modern collaborative workflows.
  • Clear technical communication skills and the ability to work effectively across disciplines.

Education and Experience

Postgraduate degree in Physics or Engineering with a focus on ASIC hardware, communication systems, and/or control systems.

Tools

  • C++, SystemCAMS
  • MATLAB, Simulink
  • Python
  • Cadence Virtuoso
  • Cadence AMS Designer
  • Xcelium AMS

Pay Range: The annual salary range for this position is $109,000 - $174,000 CAD.

Pay ranges at Ciena are designed to accommodate variations in knowledge, skills, experience, market conditions, and locations, reflecting our diverse products, industries, and lines of business. Please note that the pay range information provided in this posting pertains specifically to the primary location, which is the top location listed in case multiple locations are available.

Non-Sales employees may be eligible for a discretionary incentive bonus, while Sales employees may be eligible for a sales commission. In addition to competitive compensation, Ciena offers a comprehensive benefits package, including medical, dental, and vision plans, participation in 401(K) (USA) & DCPP (Canada) with company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company-paid holidays, paid sick leave, and vacation time. We also comply with all applicable laws regarding Paid Family Leave and other leaves of absence.

At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard.  Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination.

About Ciena

Ciena Corporation is a global supplier of telecommunications networking equipment, software, and services. The company was founded in 1992 and is headquartered in Hanover, Maryland. Ciena's products include optical transport and switching systems, software, and services that support the transport, switching, aggregation, and management of voice, video, and data traffic. Ciena serves customers in the telecommunications industry, including telecommunications service providers, cable operators, governments, and enterprises. The company has approximately 7,000 employees worldwide and operates in more than 100 countries.
Learn more about Ciena
Size
7,241 employees
Market Cap
$7.3 billion
Industry
Net Income
$354.3 million
Founded
1992
5 Year Trend
+5.3%
Revenue
$3.4 billion
NASDAQ

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