Advanced Micro Devices, Inc

RTL Design Engineer

Advanced Micro Devices, Inc • $110K — $130K *
Rochester, NY 14609In-Person
Information Technology
Less than 5 years of experience
Today
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Job Overview by Ladders

Qualifications

  • 5-7 years of experience in RTL design and integration
  • Strong experience with SystemVerilog for SOC designs
  • Proficient in timing closure and constraints development (SDC)
  • Experience in low-power design methodology
  • Familiarity with power management interfaces (I²C, SPI, APB, SVID/PMBus)
  • Bachelor's or master's degree in electrical/computer engineering

Responsibilities

  • Own top-level RTL design and analog macro integration
  • Collaborate with analog macro teams for block integration and debugging
  • Author micro-architecture specifications
  • Interface with Physical Design team for timing closure
  • Create and review timing constraints including clock-domain crossings
  • Drive timing closure and manage design tradeoffs
  • Validate analog behavioral models against design intent
  • Support post-silicon bring-up and validation

Benefits

  • Comprehensive AMD benefits package
  • Opportunities for mentorship and leadership growth
  • Collaborative work environment across multiple engineering disciplines
  • Focus on innovation and first-time silicon success
Full Job Description
THE ROLE:

The focus of this role is to own the top-level RTL design and integration of AMD's mixed-signal power management IP, and to drive that design through timing closure and tape-out in partnership with our physical design and verification teams.

THE PERSON:

You have a passion for digital design, mixed-signal integration, and silicon that works for the first time. You are a team player with excellent communication skills and experience collaborating with design, analog, firmware, and physical design teams. You have strong analytical and problem-solving skills, and you are ready to take ownership of hard problems.

KEY RESPONSIBILITIES:

Top-Level SOC Design
  • Own top-level RTL design and analog macro integration for mixed-signal power management IC
  • Partner with analog macro teams on block integration, including bring-up and debug of analog behavioral models in the digital simulation environment
  • Author micro-architecture specifications in partnership with Architecture and Firmware

Physical Design, Timing & Design Quality
  • Act as primary interface between RTL design and the Physical Design / timing closure team
  • Create and review timing constraints (SDC), including analog macro boundaries and clock-domain crossings
  • Drive timing closure and ECO support through tape-out; manage area, power, and floorplan tradeoffs with PD
  • Own RTL signoff before each release to PD: lint, CDC/RDC, synthesis QoR, and connectivity checks

Verification & Bring-Up
  • Partner with the verification team to define and review test plans and coverage goals
  • Validate analog behavioral models against analog design intent for functionality and timing, and drive discrepancies to resolution with the Analog team
  • Debug block- and system-level simulation failures to root cause
  • Support post-silicon bring-up and silicon-to-RTL correlation

Collaboration
  • Work across Analog, Firmware, Systems Engineering, and Architecture teams
  • Mentor junior engineers and lead design reviews


PREFERRED EXPERIENCE
  • RTL design in SystemVerilog, with ownership of blocks or subsystems through tape-out
  • Hands-on experience with timing constraints (SDC) development and timing closure on production silicon
  • Proficiency with synthesis, lint, and CDC/RDC tools and their integration into a design flow
  • Strong scripting skills in Python and TCL
  • Top-level SOC or chip-level integration ownership on a mixed-signal device
  • Integration and debug of analog behavioral models (Verilog-AMS, real-number/wreal modeling) in a digital simulation environment
  • Low-power design methodology and UPF-based power intent
  • Familiarity with standard control interfaces used in power management (I²C, SPI, APB, SVID/PMBus)
  • Post-silicon bring-up and debug experience, including silicon-to-RTL correlation


ACADEMIC CREDENTIALS:
  • Bachelors or master's in electrical/computer engineering


#LI-DP1

Benefits offered are described: AMD benefits at a glance.

This posting is for an existing vacancy.

About Advanced Micro Devices, Inc

Advanced Micro Devices, Inc. Careers

Join the innovative forefront of technology with a career at Advanced Micro Devices, Inc. (AMD), a leader in semiconductor development. As part of our global team, you will contribute to an organization renowned for its dedication to innovation, leadership, and diversity in the tech industry.

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Innovative Work Environment

Join a team of over 12,000 dedicated professionals at the intersection of technology, industry expertise, and digital innovation. At AMD, you will work on groundbreaking projects that shape the future of computing and graphics. Our collaborative environment encourages networking and the sharing of ideas across teams and disciplines.

Career Development and Benefits

AMD is committed to the development of its employees. We offer robust training programs, including leadership development and diversity training, to ensure our team is equipped for both current challenges and future opportunities. Our benefits package is designed to support the well-being and financial security of our employees and their families.

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Learn more about Advanced Micro Devices, Inc
Size
15,500 employees
Market Cap
$100.9 billion
Industry
Manufacturing & Automotive
Net Income
$2.4 billion
Founded
1969
5 Year Trend
+30.9%
Revenue
$9.7 billion
NASDAQ
AMD
* Ladders Estimates

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