Job Posting Title:
Principal Signal Power Integrity Engineer, Texas Institute for Electronics
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Hiring Department:
Operational Services and Strategies
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Position Open To:
All Applicants
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Weekly Scheduled Hours:
40
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FLSA Status:
To Be Determined at Offer
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Earliest Start Date:
Ongoing
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Position Duration:
Expected to Continue
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Location:
AUSTIN, TX
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Job Details:
General Notes

Purpose

This role is to lead and execute comprehensive Signal Integrity (SI) and Power Integrity (PI) simulations for advanced 2.5D/3.0D heterogeneous integration and multi-material packages. The position will also collaborate with EDA vendors, OSATs, and foundries, and stay current with next-gen interface standards to guide technical strategy and mentor junior engineers.

Responsibilities

• Own and drive signal integrity and power integrity (SI/PI) analysis end-to-end for advanced 2.5D/3.0D heterogeneous integration packages-from initial interconnect architecture through silicon-package co-design to final signoff.
• Perform high-speed interconnect modeling and extraction (S-parameters, RLCK, transmission-line models) across TSVs, micro-bumps, hybrid bonds, RDL, and advanced substrates (silicon, glass, organic).
• Architect and optimize power delivery networks (PDN) for multi-chiplet 3D stacks-including target impedance analysis, decoupling strategy, IR-drop simulation, and PDN resonance identification from die through package to board.
• Execute full SI simulation workflows: EM extraction, crosstalk analysis, eye diagram/BER prediction, channel compliance simulation, and jitter budgeting for high-speed interfaces (PCIe Gen6/7, CXL, UCIe, SerDes, HBM).
• Build and validate SI/PI models for the 3D Assembly Design Kit (ADK)-creating accurate, reusable electrical models that enable chiplet designers to perform system-level co-design against TIE's integration platform.
• Develop reference flows, scripts, and automation that make SI/PI enablement repeatable and accessible to internal design teams and external customers.
• Collaborate directly with EDA vendors (Cadence, Ansys, Synopsys, Siemens, Keysight), OSATs, and foundries to develop, benchmark, and refine package-level SI/PI simulation flows and tool interoperability.
• Track and incorporate requirements from next-gen interface standards (UCIe, PCIe, CXL, UALink, OIF-CEI, HBM) into package design rules and SI/PI methodology.
• Guide technical strategy for SI/PI at TIE, mentor engineers, and represent TIE in industry standards bodies, customer design reviews, and technical forums.

Required Qualifications

• BS in Electrical Engineering, Computer Engineering, Applied Physics, or related discipline.
• 12+ years of direct, hands-on experience in signal integrity and/or power integrity engineering for advanced packaging, 2.5D/3DIC, or heterogeneous integration platforms.
• Deep expertise with SI/PI and EM extraction tools: Ansys HFSS/SIwave, Cadence Sigrity/Clarity 3D, Synopsys RaptorX, Keysight ADS/PathWave, Siemens HyperLynx, or equivalent.
• Proven ability to build and deliver package-level electrical models (S-parameters, broadband RLCK, dielectric characterization) and integrate them into design enablement and signoff flows.
• Strong understanding of high-speed signaling fundamentals: transmission-line theory, impedance matching, return-path management, crosstalk mechanisms, ISI/jitter decomposition, and equalization techniques.
• Experience with PDN design methodology: target impedance, decap optimization, plane resonance, IR-drop analysis, and SSN/SSO mitigation in multi-die environments.
• Hands-on scripting and automation skills (Python, Tcl, SKILL, etc.) to streamline simulation and extraction flows.
• You're able to work with ambiguity, act with urgency, and take personal ownership for outcomes. Ability to make things happen.
• Execution mindset. You have demonstrated experience working in a hands-on role driving progress across multiple initiatives without layers of management.
• Location. Austin, Texas is preferred for close collaboration with our engineering teams and partners. Hybrid work arrangements may be possible, with travel up to 30-50% as needed. (Any flexible arrangement would be subject to university policies and approvals. Working outside of the state of Texas is subject to University review and approval in relation to jurisdictional employment and tax related laws, rules, and regulations.

Preferred Qualifications

• MS or PhD in Electrical Engineering, Applied Physics, or related discipline.
• Deep experience with multi-material package SI/PI challenges (Si interposers, glass substrates, organic build-up, Cu pillar/hybrid bond transitions) and their impact on signal loss, impedance control, and PDN performance.
• Demonstrated expertise in channel compliance and link-budget analysis for PCIe, CXL, UCIe, SerDes, or HBM, including silicon-package-board co-simulation.
• Familiarity with industry standards and working groups (IEEE, JEDEC, OIF, UCIe Consortium, 3Dblox, JEP30).
• Working knowledge of thermal and mechanical co-simulation and how thermo-mechanical effects (warpage, stress, CTE mismatch) influence SI/PI performance in 3D stacks.
• Experience creating or contributing to PDK/ADK simulation collateral for SI/PI design enablement.
• Track record of technical publications, patents, or open-source contributions in signal integrity, power integrity, or high-speed package design.

Salary Range

TIE Pays Industry-Competitive Salaries

Working Conditions

• Repetitive use of a keyboard at a workstation
• Use of manual dexterity (ex: using a mouse)

Work Shift

• Monday - Friday 8am to 5pm
• Occasional/frequent nights/weekends required

Required Materials

• Resume/CV
• 3 work references with their contact information; at least one reference should be from a supervisor

Importantfor applicants who are NOT current university employees or contingent workers: You will be prompted to submit your resume the first time you apply, then you will be provided an option to upload a new Resume for subsequent applications. Any additional Required Materials (letter of interest, references, etc.) will be uploaded in the Application Questions section; you will be able to multi-select additional files. Before submitting your online job application, ensure that ALL Required Materials have been uploaded. Once your job application has been submitted, you cannot make changes.

Important for Current university employees and contingent workers: As a current university employee or contingent worker, you MUST apply within Workday by searching for Find UT Jobs. If you are a current University employee, log-in to Workday, navigate to your Worker Profile, click the Career link in the left hand navigation menu and then update the sections in your Professional Profile before you apply. This information will be pulled in to your application. The application is one page and you will be prompted to upload your resume. In addition, you must respond to the application questions presented to upload any additional Required Materials (letter of interest, references, etc.) that were noted above.

Employment Eligibility:
Regular staff who have been employed in their current position for the last six continuous months are eligible for openings being recruited for through University-Wide or Open Recruiting, to include both promotional opportunities and lateral transfers. Staff who are promotion/transfer eligible may apply for positions without supervisor approval.

Retirement Plan Eligibility:
The retirement plan for this position is Teacher Retirement System of Texas (TRS), subject to the position being at least 20 hours per week and at least 135 days in length. This position has the option to elect the Optional Retirement Program (ORP) instead of TRS, subject to the position being 40 hours per week and at least 135 days in length.

Background Checks:

A criminal history background check will be required for finalist(s) under consideration for this position.

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