Astera Labs

Principal Signal and Power Integrity Engineer

Astera Labs$185K — $240K *
Telecommunications & Hardware
8 - 10 years of experience
Job Overview by Ladders

Qualifications

  • Bachelor's degree in Electrical Engineering required; Master's preferred.
  • 8+ years experience in complex SoC/silicon product development for Server and Networking applications.
  • 8+ years of hands-on experience in high-speed Signal Integrity (SI) and Power Integrity (PI) design.
  • Proven ability to define hardware system constraints and high-speed technology roadmaps.
  • Cross-functional collaboration skills with electrical design teams.
  • Self-starter with a hands-on work ethic in dynamic environments.
  • Proven problem solver, ideally as a technical lead.
  • Authorization to work in the US with immediate availability.

Responsibilities

  • Execute SI planning, design, modeling, and simulation for connectivity products.
  • Conduct lab validation with various system configurations.
  • Collaborate with design teams to develop integrated systems.
  • Define and implement high-speed technology roadmaps.
  • Drive research and development in Signal and Power Integrity.
  • Lead root cause analysis and corrective actions for design challenges.
  • Present findings and designs to stakeholders and key team members.

Benefits

  • Onsite work environment fostering collaboration and innovation.
  • Opportunity to work on cutting-edge AI and ML products.
  • Dynamic work environment encouraging hands-on problem solving.
  • Cross-functional collaboration with leading engineers in the field.
Full Job Description


At Astera Labs, we seek motivated Principal Signal and Power Integrity Engineers to work on our game-changing portfolio of connectivity products for Artificial Intelligence and Machine Learning applications. In this role, you will execute the SI planning, design, modeling, simulation, and lab validation with various system configurations. This position will be onsite.

Basic Qualifications
  • Strong academic/technical background in electrical engineering; Bachelor's is required; Master's preferred.
  • 8+ years of experience supporting or developing complex SoC/silicon products for Server and Networking applications.
  • 8+ years of hands-on high-speed SI/PI design, simulation, and measurement experience.
  • Have a proven track record with defining hardware system constraints and high-speed technology roadmaps.
  • Cross-functional design mentality with the electrical design community to develop systems.
  • Self-starting, professional, and hands-on work ethic that can execute intense research in a dynamic environment.
  • Proven track record solving problems independently, preferably as a tech lead.
  • Entrepreneurial, open-minded behavior, and can-do attitude.
  • Authorized to work in the US and start immediately.

Required Experience
  • Familiar with SI and PI design challenges for PCIe Gen5/6 and/or 224/448G Ethernet PCB and interconnects
  • 2D and 3D EM simulation experience with Cadence/Ansys/ADS/etc. toolsets
  • EM modeling of BGA and connector structures
  • High-speed SERDES channel simulation, and equalization
  • PI simulations with Ansys/Cadence toolsets
  • Familiar with VNA, TDR, real-time and sub-sampling oscilloscopes, etc.
  • Working knowledge of PCB fabrication limits and trade-offs
  • Familiar with industry-standard such as PCI-SIG, and IEEE802.3, especially Electrical sections.
  • Strong debugging, analysis, and problem-solving skills with experience leading root cause and correction action teams. An inherent sense of urgency and accountability. Must have the ability to multi-task in a fast-paced environment.

Your base salary will be determined based on your experience and the pay of employees in similar positions. The base salary range is $185,000 USD - $240,000 USD for Principal level, and $237,500 USD - $250,000 USD for Senior Principal level. The actual level is to be determined by the years of experience and interview outcome.

About Astera Labs

Astera Labs is a semiconductor company that designs and develops purpose-built connectivity solutions for data-centric systems. The company's portfolio of products includes system-aware semiconductor integrated circuits (ICs), boards, and intellectual property (IP) that are used in data center servers, storage, and networking equipment. Astera Labs' products are designed to improve the performance, latency, and power consumption of data-centric systems. The company was founded in 2018 and is headquartered in Santa Clara, California.
Learn more about Astera Labs
Size
51 employees
Industry
Net Income
-$3 million
Founded
2018
Revenue
$5 million
NASDAQ

Similar Jobs

More Jobs at Astera Labs

More Telecommunications & Hardware Jobs

Find similar Principal Signal and Power Integrity Engineer jobs: