Principal Engineer, High-Speed IO & Memory Systems

SambaNova Systems

$130K — $180K *
Consumer Technology
5 - 7 years of experience
Job Overview by Ladders

Qualifications

  • M.S. in Electrical Engineering or Computer Science.
  • 7+ years of experience in post-silicon validation or closely related hardware engineering discipline.
  • Hands-on experience with high-speed IO or memory protocols like PCIe, Ethernet, HBM, CXL, UCIe.
  • Strong analytical skills for test development and data-driven debug.
  • Proficient in scripting languages such as Python or Bash.
  • Proven ability to lead cross-functional debugging efforts across hardware and software teams.
  • Self-starter with high ownership and proactive problem-solving communication.

Responsibilities

  • Own post-silicon bring-up and validation of high-speed IO and memory subsystems.
  • Drive system power-on readiness, including debug infrastructure and tooling setup.
  • Lead system-level debug across silicon, board, and software layers.
  • Partner with design and firmware teams to ensure timely issue resolution.
  • Support product validation and deployment in collaboration with customer engineering teams.
  • Review SoC architecture and contribute to pre-silicon verification.
  • Develop scripts and tooling to automate validation and debug workflows.

Benefits

  • 95% premium coverage for employee medical insurance.
  • 77% premium coverage for dependents.
  • Health Savings Account (HSA) with employer contribution.
  • Dental, Vision, Short/Long-term Disability, and life insurance plans.
  • Flexible Spending Account (FSA) options for various healthcare needs.
  • Well-being benefits, including Headspace subscription and Gympass+ membership.
Full Job Description
About the Role

SambaNova's DataScale® platform pushes the limits of AI compute-and the integrity of every high-speed interface and memory subsystem is critical to its performance in the field. As a Principal Engineer, Post-Silicon Validation, you will own the bring-up, debug, and validation of high-speed IO and memory subsystems from first silicon through customer deployment.

This is a deeply technical, high-ownership role for an engineer who thrives on hard debug problems. You will operate across silicon, board, and software layers-leading cross-functional teams to root cause, driving issues to resolution, and building the infrastructure that makes future bring-up cycles faster and more reliable. If you have a bias for action, a sharp analytical mind, and the kind of depth that comes from years in post-silicon validation, this role was built for you.

What You'll Do

System Bring-Up & Validation
  • Own post-silicon bring-up and validation of high-speed IO and memory subsystems, including characterization, functional validation, stress testing, and performance analysis.
  • Drive system power-on readiness-including debug infrastructure, tooling setup, and contingency planning-to enable first-pass bring-up success.

Debug & Cross-Functional Execution
  • Lead system-level debug across silicon, board, and software layers, driving complex issues to verified root cause and resolution.
  • Partner with design, firmware, verification, and systems teams to ensure timely bring-up and issue closure-without losing momentum.

Productization & Deployment
  • Support product validation, deployment, and RMA debug in partnership with systems and customer engineering teams.
  • Ensure product release readiness with a clear focus on stability, performance, and long-term field reliability.

Pre-Silicon & Design Feedback
  • Review SoC architecture, board design, and SI/PI analysis through the lens of post-silicon debug and real-world deployment.
  • Contribute to pre-silicon verification and emulation to improve bring-up efficiency and test coverage before first silicon arrives.

Infrastructure & Methodology
  • Develop scripts and tooling to automate validation, debug, and data analysis workflows-reducing manual effort and accelerating iteration.
  • Drive continuous improvement in post-silicon validation methodologies, debug infrastructure, and test scalability across product generations.

What You'll Bring

Required
  • M.S. in Electrical Engineering or Computer Science.
  • 7+ years of experience in post-silicon validation, system bring-up, or a closely related hardware engineering discipline.
  • Hands-on experience with high-speed IO or memory protocols: PCIe, Ethernet, HBM, CXL, UCIe, or similar.
  • Strong analytical skills applied to test development and data-driven debug.
  • Scripting proficiency in Python, Bash, or equivalent.
  • Demonstrated ability to lead cross-functional debugging efforts across hardware, firmware, and software teams.
  • High ownership, self-starter mindset-you drive issues to closure without waiting to be asked.
  • Clear and effective communicator with a proactive, collaborative approach to problem-solving.

Preferred
  • Deep expertise in high-speed SerDes training, adaptation, and equalization.
  • Experience with mixed-signal IO design and validation.
  • Hands-on proficiency with lab equipment including high-bandwidth oscilloscopes, BERTs, and VNAs.
  • Programming experience in C or C++ for tooling, automation, or low-level debug.

Benefits Summary for US-Based, Full-Time Employment Positions
SambaNova offers a competitive total rewards package, including the base salary, plus equity and benefits. We cover 95% premium coverage for employee medical insurance, and 77% premium coverage for dependents and offer a Health Savings Account (HSA) with employer contribution. We also offer Dental, Vision, Short/Long term Disability, Basic Life, Voluntary Life, and AD&D insurance plans in addition to Flexible Spending Account (FSA) options like Health Care, Limited Purpose, and Dependent Care. Our library of well-being benefits available to you and your dependents includes a full subscription to Headspace, Gympass+ membership with access to physical gyms, One Medical membership, counseling services with an Employee Assistance Program, and much more.

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